HT67F5652 datasheet(102/224 Pages) HOLTEK

102 / 224 page

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HT67F5652

24-Bit Delta Sigma A/D + LCD Flash MCU

HT67F5652

24-Bit Delta Sigma A/D + LCD Flash MCU

Capture Input Mode

ToselectthismodebitsTnM1andTnM0inthePTMnC1registershouldbesetto01respectively.

Thismodeenablesexternalsignalstocaptureandstorethepresentvalueoftheinternalcounter

andcanthereforebeusedforapplicationssuchaspulsewidthmeasurements.Theexternalsignal

issuppliedontheTPn_0,TPn_1orTCKnpin,selectedbytheTnCKSbitinthePTMnC1register.

Theinputpinactiveedgecanbeeitherarisingedge,afallingedgeorbothrisingandfallingedges;

theactiveedgetransitiontypeisselectedusingtheTnIO1andTnIO0bitsinthePTMnC1register.

ThecounterisstartedwhentheTnONbitchangesfromlowtohighwhichisinitiatedusingthe

applicationprogram.

WhentherequirededgetransitionappearsontheTPn_0,TPn_1orTCKnpinthepresentvaluein

thecounterwillbelatchedintotheCCRAregisterandaTMinterruptgenerated.Irrespectiveof

whateventsoccurontheTPn_0,TPn_1orTCKnpinthecounterwillcontinuetofreerununtilthe

TnONbitchangesfromhightolow.WhenaCCRPcomparematchoccursthecounterwillreset

backtozero;inthiswaytheCCRPvaluecanbeusedtocontrolthemaximumcountervalue.When

aCCRPcomparematchoccursfromComparatorP,aTMinterruptwillalsobegenerated.Counting

thenumberofoverflowinterruptsignalsfromtheCCRPcanbeausefulmethodinmeasuringlong

pulsewidths.TheTnIO1andTnIO0bitscanselecttheactivetriggeredgeontheTPn_0,TPn_1

orTCKnpintobearisingedge,fallingedgeorbothedgetypes.IftheTnIO1andTnIO0bitsare

bothsethigh,thennocaptureoperationwilltakeplaceirrespectiveofwhathappensontheTPn_0,

TPn_1orTCKnpin,howeveritmustbenotedthatthecounterwillcontinuetorun.

AstheTPn_0,TPn_1orTCKnpinispinsharedwithotherfunctions,caremustbetakeniftheTMn

isintheCaptureInputMode.Thisisbecauseifthepinissetupasanoutput,thenanytransitionson

thispinmaycauseaninputcaptureoperationtobeexecuted.TheTnCCLR,TnOCandTnPOLbits

arenotusedinthisMode.

HT67F5652 Datasheet(PDF) 102 Page - Holtek Semiconductor Inc