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HT67F5652 Datasheet(PDF) 11 Page - Holtek Semiconductor Inc |
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HT67F5652 Datasheet(HTML) 11 Page - Holtek Semiconductor Inc |
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11 / 224 page  Rev. 1.00 10 De�e��e� 0�� �01� Rev. 1.00 11 De�e��e� 0�� �01� HT67F5652 24-Bit Delta Sigma A/D + LCD Flash MCU HT67F5652 24-Bit Delta Sigma A/D + LCD Flash MCU Pin Description Thefunctionofeachpinislistedinthefollowingtable,howeverthedetailsbehindhoweachpinis configurediscontainedinothersectionsofthedatasheet. Pin Name Function OPT I/T O/T Descriptions PA0/ICPDA/ OCDSDA PA0 PAPU PAWU ST CMOS Gene�al pu�pose I/O. Registe� ena�led pull-up and wake-up. ICPDA — ST CMOS ICP add�ess/data OCDSDA — ST CMOS OCDS add�ess/data� fo� EV �hip only. PA1/RX PA1 PAPU PAWU ST CMOS Gene�al pu�pose I/O. Registe� ena�led pull-up and wake-up. RX — ST — UART �e�eive� pin PA�/ICPCK/ OCDSCK PA� PAPU PAWU ST CMOS Gene�al pu�pose I/O. Registe� ena�led pull-up and wake-up. ICPCK — ST — ICP �lo�k OCDSCK — ST — OCDS �lo�k� fo� EV �hip only. PA3/INT0/C0P PA3 PAPU PAWU ST CMOS Gene�al pu�pose I/O. Registe� ena�led pull-up and wake-up. INT0 — ST — Exte�nal Inte��upt 0 input C0P CP0C AN — Co�pa�ato� 0 positive input PA4/INT1/C0N PA4 PAPU PAWU ST CMOS Gene�al pu�pose I/O. Registe� ena�led pull-up and wake-up. INT1 — ST — Exte�nal Inte��upt 1 input C0N CP0C AN — Co�pa�ato� 0 negative input PA5/INT�/C1P PA5 PAPU PAWU ST CMOS Gene�al pu�pose I/O. Registe� ena�led pull-up and wake-up. INT� — ST — Exte�nal Inte��upt � input C1P CP1C AN — Co�pa�ato� 1 positive input PA�/INT3/C1N PA� PAPU PAWU ST CMOS Gene�al pu�pose I/O. Registe� ena�led pull-up and wake-up. INT3 — ST — Exte�nal Inte��upt 3 input C1N CP1C AN — Co�pa�ato� 1 negative input PA�/TX PA� PAPU PAWU ST CMOS Gene�al pu�pose I/O. Registe� ena�led pull-up and wake-up. TX — — CMOS UART t�ans�eive� pin PB0 PB0 PBPU ST CMOS Gene�al pu�pose I/O. Registe� ena�led pull-up. PB1/OSC1 PB1 PBPU ST CMOS Gene�al pu�pose I/O. Registe� ena�led pull-up. OSC1 CO HXT — HXT Os�illato� input PB�/OSC� PB� PBPU ST CMOS Gene�al pu�pose I/O. Registe� ena�led pull-up. OSC� CO — HXT HXT Os�illato� output PB3/XT1 PB3 PBPU ST CMOS Gene�al pu�pose I/O. Registe� ena�led pull-up. XT1 CO LXT — LXT Os�illato� input PB4/XT� PB4 PBPU ST CMOS Gene�al pu�pose I/O. Registe� ena�led pull-up. XT� CO — LXT LXT Os�illato� output PB5/TP0_0 PB5 PBPU ST CMOS Gene�al pu�pose I/O. Registe� ena�led pull-up. TP0_0 CTRL0 TM0C0 — CMOS TM0 (10-�it CTM) output PB�/SEG38 PB� PBPU ST CMOS Gene�al pu�pose I/O. Registe� ena�led pull-up. SEG38 LCD3 — SEG LCD Seg�ent output PB�/SEG39 PB� PBPU ST CMOS Gene�al pu�pose I/O. Registe� ena�led pull-up. SEG39 LCD3 — SEG LCD Seg�ent output |
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