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PD64012 Datasheet(PDF) 9 Page - List of Unclassifed Manufacturers |
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PD64012 Datasheet(HTML) 9 Page - List of Unclassifed Manufacturers |
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9 / 16 page ![]() PD64012 12-CHANNEL PoE MANAGER Vp o rt M e a s u rem en t I cla s s Re g PoL Se q u e n c e r P o w e r M a n a ge m e nt I lim Re g Cu r re n t a n d A C Vo lta g e M e asu re m e nt Ch a n n e l RT Co n tro l Sta tu s O v e r lo a d / D isco nn ec t R eco v e ry Co m In te rface SP I I2C Ov e rlo a d Lo gic DC Dis c o n n e c t Lo gic A C D isc on ne ct Ma c ro C la ssifica tio n R e sis tor Line D e tectio n Re a l T im e P rotectio n 8-b it AD C I lim 8- b i t D A C I cla s s 8- b i t D A C C u r re n t L im itin g x12 Clo c k O s c illa to r VM A IN Vm a in 48 + 5 v Pu m p Up PO R Vo lta g e Re g u la to r R ese t + 4 8 V V P ORT P OS VP O R TNE G PO RT SE NS E V p o r t L e v e l S h ifte r L in e D e te c tio n x1 2 A C D isc on ne ct G e ne ra to r x1 2 AC D A C 8-b it LD D A C Vpo r t 10 -b it AD C Se n s e Re s is to r C las sificatio n V m ain -1 7 V Dig ita l Dig ita l An a lo g An a lo g MIS O MO S I SS SC K SC L SD A D C D isc on nec t Co m p a ra to r SP I I2C C o mmu n ic a tio n I/O Figure 5: Internal Block Diagram Digital Section Communication I/O The PD64012 incorporates two communication interfaces. When operating in the Enhanced mode, an SPI bus connects the PD63000 MCU to the PD64012s. The second interface is the I 2C, used in the Automatic mode (with the host). Both interfaces are used to communicate the contents of internal registers between the PD64012 logic and the MCU. PoE Sequencer This central block of the Digital section includes a combination of internal state machines (macros). It is fed from the Overload/Disconnect Recovery circuit and from the Power Management block. Power Management Receives data from the Vport Measurement block and receives commands and controls from the Communication Interface. This, in order to control the power allocated to the system, as defined by the host. Power Management receives requests to enable ports and decides, by communicating with the Sequencer, whether power is to be allocated. Overload /Disconnect Recovery There is a number of macros which decide on port enable and some on port disconnect. Port enabling: Classification, Resistor Line Detection and Vport Measurement. Port disable: AC Disconnect, DC Disconnect and Overload Logic. These macros are connected to the Channel RT Control Status block. Based on the inputs from these macros, the Channel RT controller starts the shutdown operation or the recovery process. This is done according to preprogrammed parameters for different time windows, as shown in Figure 2, Power Limits. www.powerdsine.com © PowerDsine 2003 Information in this document subject 06-0003-058 (Rev. 2.8) / 5 August 2004 to change without prior notice. 9 |
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