AD5683RARMZ datasheet(19/28 Pages) AD

19 / 28 page

Data Sheet

AD5683R/AD5682R/AD5681R/AD5683

Rev. D | Page 19 of 28

THEORY OF OPERATION

DIGITAL-TO-ANALOG CONVERTER

The AD5683R/AD5682R/AD5681R are single 16-bit, 14-bit, and

12-bit, serial input, voltage output DACs with a 2.5 V internal

reference. The devices operate from supply voltages of 2.7 V to

5.5 V. Data is written to the AD5683R/AD5682R/AD5681R in

a 24-bit word format via a 3-wire serial interface. The AD5683R/

AD5682R/AD5681R incorporate a power-on reset circuit that

ensures that the DAC output powers up to a zero scale. The devices

also have a software power-down mode that reduces the typical

current consumption to 2 µA maximum.

TRANSFER FUNCTION

The internal reference is on by default. For users that need an

external reference, the AD5683 is available. The input coding to

the DAC is straight binary. The ideal output voltage is given by

the following equations:

For the AD5683R,

VOUT(D) = Gain × VREF ×









536

For the AD5682R,

VOUT(D) = Gain × VREF ×













384

For the AD5681R,

VOUT(D) = Gain × VREF ×









4096

where:

D is the decimal equivalent of the binary code that is loaded to

the DAC register.

Gain is the gain of the output amplifier. By default, it is set to

×1. The gain can also be set to ×2 using the gain bit in the write

control register.

DAC ARCHITECTURE

The AD5683R/AD5682R/AD5681R/AD5683 implements

segmented string DAC architecture with an internal output

buffer. Figure 47 shows the internal block diagram.

INPUT

DAC

2.5V

REF

RESISTOR

STRING

REF (+)

REF (–)

GND

VOUT

VREF

Figure 47. DAC Channel Architecture Block Diagram

The simplified segmented resistor string DAC structure is

shown in Figure 48. The code loaded to the DAC register

determines the switch on the string that is connected to the

output buffer.

Because each resistance in the string has same value, R, the

string DAC is guaranteed monotonic.

TO OUTPUT

BUFFER

VREF

Figure 48. Simplified Resistor String Structure

Internal Reference

The AD5683R/AD5682R/AD5681R on-chip reference is on at

power-up but can be disabled via a write to the write control

The AD5683R/AD5682R/AD5681R each have a 2.5 V, 2 ppm/°C

reference, giving a full-scale output of 2.5 V or 5 V, depending

on the state of the gain bit.

The internal reference is available at the VREF pin. It is internally

buffered and capable of driving external loads of up to 50 mA.

External Reference

The VREF pin is an input pin in the AD5683. It can also be con-

figured as an input pin on the AD5683R/AD5682R/AD5681R,

allowing the use of an external reference if the application

requires it.

In the AD5683R/AD5682R/AD5681R, the default condition of

the on-chip reference is on at power-up. Before connecting an

external reference to the pin, disable the internal reference by

writing to the REF bit (Bit DB16) in the write control register.

AD5683RARMZ Datasheet(PDF) 19 Page - Analog Devices

AD5683RARMZ Datasheet(HTML) 19 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28

Datasheet Download

Link URL