LMX2336UTM datasheet(30/48 Pages) NSC

30 / 48 page

Test Setups (Continued)

LMX2335U and LMX2336U OSC

in Sensitivity Test Setup

10136741

The block diagram above illustrates the setup required to

measure the LMX2336U device’s OSC

in buffer sensitivity

level. The same setup is used for the LMX2336TMEB/

LMX2336SLEEB Evaluation Boards. This setup is similar to

the f

IN sensitivity setup except that the signal generator is

now connected to the OSC

in pin and both fIN pins are tied to

CC. The 51

Ω shunt resistor matches the OSC

in input to the

signal generator. The R counter is typically set to 1000, i.e.

RF1 R_CNTR Word = 1000 or RF2 R_CNTR Word = 1000.

The reference divider output is routed to the F

oLD pin by

selecting the RF1 PLL R Divider Output word (F

oLD Word

= 2 or 10) or the RF2 PLL R Divider Output word (F

oLD

Word = 1 or 9) in Code Loader. Similarly, a Universal

Counter is connected to the F

oLD pin and is tied to the 10

MHz reference output from the signal generator. The output

of the reference divider is monitored and should be equal to

OSC

in/ RF1 R_CNTR or OSCin/ RF2 R_CNTR.

Again, V

CC is swept from 2.7V to 5.5V. The OSCin input

frequency and voltage level are then swept with the signal

generator. The measurements are repeated at different tem-

peratures, namely T

A = -40˚C, +25˚C, and +85˚C. Sensitivity

is reached when the frequency error of the divided input

signal is greater than or equal to 1 Hz.

The LMX2335U OSC

in sensitivity test setup is very much

similar to the above test setup.

LMX2336UTM Datasheet(PDF) 30 Page - National Semiconductor (TI)

LMX2336UTM Datasheet(HTML) 30 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48

Datasheet Download

Link URL