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LMX2336UTM Datasheet(PDF) 36 Page - National Semiconductor (TI) |
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LMX2336UTM Datasheet(HTML) 36 Page - National Semiconductor (TI) |
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36 / 48 page ![]() 2.0 Programming Description 2.1 MICROWIRE INTERFACE The 22-bit shift register is loaded via the MICROWIRE interface. The shift register consists of a 20-bit Data[19:0] Field and a 2-bit Address[1:0] Field as shown below. The Address Field is used to decode the internal control register address. When LE transitions HIGH, data stored in the shift register is loaded into one of 4 control registers depending on the state of the address bits. The MSB of Data is loaded in first. The Data Field assignments are shown in Section 2.3 CONTROL REGISTER CONTENT MAP. MSB LSB Data[19:0] Address[1:0] 21 2 1 0 2.2 CONTROL REGISTER LOCATION The address bits Address[1:0] decode the internal register address. The table below shows how the address bits are mapped into the target control register. Address[1:0] Target Field Register 0 0 RF2 R 0 1 RF2 N 1 0 RF1 R 1 1 RF1 N 2.3 CONTROL REGISTER CONTENT MAP The control register content map describes how the bits within each control register are allocated to specific control functions. www.national.com 36 |
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