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MCP2517FD Datasheet(PDF) 23 Page - Microchip Technology |
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MCP2517FD Datasheet(HTML) 23 Page - Microchip Technology |
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23 / 98 page ![]() 2017-2018 Microchip Technology Inc. DS20005688B-page 23 MCP2517FD 3.2 CAN FD Controller Module Registers Configuration Registers • Register 3-6: CiCON • Register 3-7: CiNBTCFG • Register 3-8: CiDBTCFG • Register 3-9: CiTDC • Register 3-10: CiTBC • Register 3-11: CiTSCON Interrupt and Status Registers • Register 3-12: CiVEC • Register 3-13: CiINT • Register 3-14: CiRXIF • Register 3-15: CiRXOVIF • Register 3-16: CiTXIF • Register 3-17: CiTXATIF • Register 3-18: CiTXREQ Error and Diagnostic Registers • Register 3-19: CiTREC • Register 3-20: CiBDIAG0 • Register 3-21: CiBDIAG1 Fifo Control and Status Registers • Register 3-22: CiTEFCON • Register 3-23: CiTEFSTA • Register 3-24: CiTEFUA • Register 3-25: CiTXQCON • Register 3-26: CiTXQSTA • Register 3-27: CiTXQUA • Register 3-28: CiFIFOCONm – m = 1 to 31 • Register 3-29: CiFIFOSTAm – m = 1 to 31 • Register 3-30: CiFIFOUAm – m = 1 to 31 Filter Configuration and Control Registers • Register 3-31: CiFLTCONm – m = 0 to 7 • Register 3-32: CiFLTOBJm – m = 0 to 31 • Register 3-33: CiMASKm – m = 0 to 31 TABLE 3-4: REGISTER LEGEND EXAMPLE 3-2: Note: The ‘i’ shown in the register identifier denotes CANi, e.g., C1CON. The MCP2517FD contains one CAN FD Controller Module. Sym Description Sym Description R Readable bit HC Cleared by Hardware only W Writable bit HS Set by Hardware only U Unimplemented bit, read as ‘0’ 1 Bit is set at Reset S Settable bit 0 Bit is cleared at Reset C Clearable bit x Bit is unknown at Reset R/W - 0 indicates the bit is both readable and writable, and reads ‘0’ after a Reset. |
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