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PIC16F916E/P301 Datasheet(PDF) 262 Page - Microchip Technology |
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PIC16F916E/P301 Datasheet(HTML) 262 Page - Microchip Technology |
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262 / 272 page ![]() PIC16F917/916/914/913 DS41250E-page 260 Preliminary © 2005 Microchip Technology Inc. Special Event Trigger........................................ 180 Interaction of Two CCP Modules (table) ................... 177 PWM Mode ............................................................... 180 Block Diagram................................................... 181 Duty Cycle......................................................... 181 Example Frequencies/Resolutions (table) ........ 182 PWM Period...................................................... 181 Special Event Trigger and A/D Conversions............. 180 CCP. See Capture/Compare/PWM CCP1CON Register .................................................... 64, 178 CCPR1H Register ............................................................. 177 CCPR1L Register.............................................................. 177 CCPxM0 bit ....................................................................... 178 CCPxM1 bit ....................................................................... 178 CCPxM2 bit ....................................................................... 178 CCPxM3 bit ....................................................................... 178 CCPxX bit.......................................................................... 178 CCPxY bit.......................................................................... 178 CKE bit .............................................................................. 160 CKP bit .............................................................................. 161 CMCON0 Register .............................................................. 93 CMCON1 Register .............................................................. 97 Code Examples A/D Conversion ......................................................... 148 Assigning Prescaler to Timer0 .................................... 83 Assigning Prescaler to WDT ....................................... 83 Call of a Subroutine in Page 1 from Page 0................ 29 Indirect Addressing ..................................................... 30 Initializing PORTA ....................................................... 31 Initializing PORTB ....................................................... 41 Initializing PORTC....................................................... 51 Initializing PORTD....................................................... 60 Initializing PORTE ....................................................... 65 Loading the SSPBUF (SSPSR) Register .................. 163 Saving Status and W Registers in RAM ................... 198 Code Protection ................................................................ 203 Comparator Module ............................................................ 93 Comparator Voltage Reference (CVREF) Associated Registers ................................................ 100 Effects of a Reset........................................................ 99 Response Time ........................................................... 99 Comparator Voltage Reference (CVREF) ............................ 98 Accuracy/Error ............................................................ 98 Configuring.................................................................. 98 Specifications ............................................................ 236 Comparators Associated Registers ................................................ 100 C2OUT as T1 Gate ............................................... 86, 97 Configurations ............................................................. 95 Effects of a Reset........................................................ 99 Interrupts ..................................................................... 97 Operation .................................................................... 94 Operation During Sleep .............................................. 99 Outputs ....................................................................... 97 Response Time ........................................................... 99 Specifications ............................................................ 236 Synchronizing C2OUT w/ Timer1 ............................... 97 CONFIG Register.............................................................. 186 Configuration Bits.............................................................. 186 Conversion Considerations ............................................... 258 CPU Features ................................................................... 185 Customer Change Notification Service ............................. 267 Customer Notification Service ........................................... 267 Customer Support ............................................................. 267 D D/A bit ............................................................................... 160 Data EEPROM Memory.................................................... 153 Associated Registers ................................................ 158 Reading .................................................................... 156 Writing ...................................................................... 156 Data Memory ...................................................................... 14 Data/Address bit (D/A)...................................................... 160 DC Characteristics Extended and Industrial ............................................ 226 Industrial and Extended ............................................ 221 Development Support ....................................................... 215 Device Overview................................................................... 7 E EEADRH Registers................................................... 153, 154 EEADRL Registers ................................................... 153, 154 EECON1 Register..................................................... 153, 155 EECON2 Register............................................................. 153 EEDATH Register............................................................. 154 EEDATL Register ............................................................. 154 Electrical Specifications .................................................... 219 Enhanced Capture/Compare/PWM (ECCP) Enhanced PWM Mode TMR2 to PR2 Match ........................................... 90 Errata .................................................................................... 5 F Fail-Safe Clock Monitor ...................................................... 79 Fail-Safe Condition Clearing....................................... 80 Reset and Wake-up from Sleep.................................. 80 Firmware Instructions ....................................................... 205 Flash Program Memory .................................................... 153 Fuses. See Configuration Bits G General Purpose Register File ........................................... 14 I I/O Ports.............................................................................. 31 I2C Mode Addressing................................................................ 170 Associated Registers ................................................ 176 Master Mode............................................................. 175 Mode Selection ......................................................... 169 Multi-Master Mode .................................................... 175 Operation .................................................................. 169 Reception ................................................................. 171 Slave Mode SCL and SDA pins............................................ 169 Transmission ............................................................ 173 ID Locations...................................................................... 203 In-Circuit Debugger........................................................... 204 In-Circuit Serial Programming (ICSP)............................... 203 Indirect Addressing, INDF and FSR Registers ................... 30 Instruction Format............................................................. 206 Instruction Set................................................................... 205 ADDLW..................................................................... 208 ADDWF..................................................................... 208 ANDLW..................................................................... 208 ANDWF..................................................................... 208 BCF .......................................................................... 208 BSF........................................................................... 208 BTFSC ...................................................................... 209 BTFSS ...................................................................... 208 |
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