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UPD78044F Datasheet(PDF) 34 Page - NEC |
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UPD78044F Datasheet(HTML) 34 Page - NEC |
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34 / 66 page  µPD78F0034A, 78F0034AY 34 Data Sheet U14040EJ4V0DS (2) Read/write operation (TA = –40 to +85 °C, VDD = 2.7 to 4.0 V) (2/3) Parameter Symbol Conditions MIN. MAX. Unit ASTB high-level width tASTH 0.3tCY ns Address setup time tADS 30 ns Address hold time tADH 10 ns Input time from address to data tADD1 (2 + 2n)tCY – 108 ns tADD2 (3 + 2n)tCY – 120 ns Output time from RD ↓ to address tRDAD 0 200 ns Input time from RD ↓ to data tRDD1 (2 + 2n)tCY – 148 ns tRDD2 (3 + 2n)tCY – 162 ns Read data hold time tRDH 0ns RD low-level width tRDL1 (1.5 + 2n)tCY – 40 ns tRDL2 (2.5 + 2n)tCY – 40 ns Input time from RD ↓ to WAIT↓ tRDWT1 tCY – 75 ns tRDWT2 tCY – 60 ns Input time from WR ↓ to WAIT↓ tWRWT tCY – 50 ns WAIT low-level width tWTL (0.5 + 2n)tCY + 10 (2 + 2n)tCY ns Write data setup time tWDS 60 ns Write data hold time tWDH 10 ns WR low-level width tWRL1 (1.5 + 2n)tCY – 30 ns Delay time from ASTB ↓ to RD↓ tASTRD 10 ns Delay time from ASTB ↓ to WR↓ tASTWR 2tCY – 30 ns Delay time from RD ↑ to ASTB↑ in tRDAST 0.8tCY – 30 1.2tCY ns external fetch Hold time from RD ↑ to address in tRDADH 0.8tCY – 30 1.2tCY + 60 ns external fetch Write data output time from RD ↑ tRDWD 40 ns Write data output time from WR ↓ tWRWD 20 120 ns Hold time from WR ↑ to address tWRADH 0.8tCY – 30 1.2tCY + 60 ns Delay time from WAIT ↑ to RD↑ tWTRD 0.5tCY 2.5tCY + 50 ns Delay time from WAIT ↑ to WR↑ tWTWR 0.5tCY 2.5tCY + 50 ns Remarks 1. tCY = TCY/4 2. n indicates the number of waits. 3. CL = 100 pF (CL is the load capacitance of the AD0 to AD7, A8 to A15, RD, WR, WAIT, and ASTB pins.) |
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