UPD78044F datasheet(13/66 Pages) NEC

13 / 66 page

µPD78F0034A, 78F0034AY

Data Sheet U14040EJ4V0DS

3.2 Non-Port Pins (2/2)

Pin Name

I/O

Function

After Reset

Alternate

Function

A8 to A15

Output

Higher address bus for extending memory externally.

Input

P50 to P57

Output

Strobe signal output for read operation of external memory.

Input

P64

Strobe signal output for write operation of external memory.

P65

WAIT

Input

Inserting wait for accessing external memory.

Input

P66

ASTB

Output

Strobe output which externally latches address information output to

Input

P67

ports 4 and 5 to access external memory.

ANI0 to ANI7

Input

A/D converter analog input.

Input

P10 to P17

ADTRG

Input

A/D converter trigger signal input.

Input

P03/INTP3

AVREF

Input

A/D converter reference voltage input.

––

AVDD

–

A/D converter analog power supply.

––

Set the voltage equal to VDD0 or VDD1.

AVSS

–

A/D converter ground potential.

––

Set the voltage equal to VSS0 or VSS1.

RESET

Input

System reset input.

––

Input

Connecting crystal resonator for main system clock oscillation.

––

–

––

XT1

Input

Connecting crystal resonator for subsystem clock oscillation.

––

XT2

–

––

VDD0

–

Positive power supply voltage for ports.

––

VSS0

–

Ground potential of ports.

––

VDD1

–

Positive power supply (except ports).

––

VSS1

–

Ground potential (except ports).

––

VPP

–

Applying high-voltage for program write/verify. Connect directly to VSS0

––

or VSS1 in normal operation mode.

UPD78044F Datasheet(PDF) 13 Page - NEC

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