www.ti.com

EXAMPLE BOARD LAYOUT

38X (0.5)

(R0.05) TYP

0.05 MAX

ALL AROUND

0.05 MIN

ALL AROUND

1.17 TYP

(0.775)

TYP

42X (0.6)

42X (0.25)

(3.3)

(8.8)

(7.55)

(2.05)

(

0.2) TYP

VIA

(3.525) TYP

WQFN - 0.8 mm max height

RUA0042A

PLASTIC QUAD FLATPACK - NO LEAD

4219139/A 03/2020

NOTES: (continued)

4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature

number SLUA271 (www.ti.com/lit/slua271).

5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown

on this view. It is recommended that vias under paste be filled, plugged or tented.

SYMM

SYMM

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN

SCALE: 10X

SEE SOLDER MASK

DETAIL

1

17

18

21

22

38

39

42

43

METAL EDGE

SOLDER MASK

OPENING

EXPOSED

METAL

METAL UNDER

SOLDER MASK

SOLDER MASK

OPENING

EXPOSED

METAL

NON SOLDER MASK

DEFINED

(PREFERRED)

SOLDER MASK DEFINED

SOLDER MASK DETAILS