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DS160PR412RUAR Datasheet(PDF) 6 Page - Texas Instruments |
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DS160PR412RUAR Datasheet(HTML) 6 Page - Texas Instruments |
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6 / 37 page ![]() 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted)(1) MIN MAX UNIT VCCABSMAX Supply Voltage (VCC) –0.5 4.0 V VIOCMOS,ABSMAX 3.3 V LVCMOS and Open Drain I/O voltage –0.5 4.0 V VIO4LVL,ABSMAX 4-level Input I/O voltage –0.5 2.75 V VIOHS-RX,ABSMAX High-speed I/O voltage (RXnP, RXnN) –0.5 3.2 V VIOHS-TX,ABSMAX High-speed I/O voltage (TXnP, TXnN) –0.5 2.75 V TJ,ABSMAX Junction temperature 150 °C Tstg Storage temperature range –65 150 °C (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 6.2 ESD Ratings VALUE UNIT V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V Charged device model (CDM), per JEDEC specification JESD22- C101(2) ±500 (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Pins listed as ±2 kV may actually have higher performance. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 6.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) MIN NOM MAX UNIT VCC Supply voltage, VCC to GND DC plus AC power should not exceed these limits 3.0 3.3 3.6 V NVCC Supply noise tolerance1 DC to <50 Hz, sinusoidal 250 mVpp 50 Hz to 500 kHz, sinusoidal 100 mVpp 500 kHz to 2.5 MHz, sinusoidal 33 mVpp >2.5 MHz, sinusoidal 10 mVpp TRampVCC VCC supply ramp time From 0 V to 3.0 V 0.150 100 ms TJ Operating junction temperature –40 125 °C TA Operating ambient temperature –40 85 °C PWLVCMOS Minimum pulse width required for the device to detect a valid signal on LVCMOS inputs PD, SEL 200 uS VCCSMBUS SMBus/I2C SDA and SCL Open Drain Termination Voltage Supply voltage for open drain pull-up resistor 3.6 V FSMBus SMBus/I2C clock (SCL) frequency in SMBus slave mode 10 400 kHz VIDLAUNCH Source differential launch amplitude 800 1200 mVpp DS160PR412 SNLS685 – DECEMBER 2020 www.ti.com 6 Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated Product Folder Links: DS160PR412 |
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