AM6421 datasheet(140/237 Pages) TI

140 / 237 page

DDR0_CKP

DDR0_CKN

Figure 7-26. DDRSS Switching Characteristics

For more information, see DDR Subsystem (DDRSS) section in Memory Controllers chapter in the device TRM.

7.10.5.3 ECAP

Table 7-31, Table 7-32, Figure 7-27, Table 7-33, and Figure 7-28 present timing conditions, requirements, and

switching characteristics for ECAP.

Table 7-31. ECAP Timing Conditions

PARAMETER

MIN

MAX

UNIT

INPUT CONDITIONS

SRI

Input slew rate

V/ns

OUTPUT CONDITIONS

Output load capacitance

Table 7-32. ECAP Timing Requirements

see Figure 7-27

NO.

PARAMETER

DESCRIPTION

MIN

MAX

UNIT

CAP1

tw(CAP)

Pulse duration, CAP (asynchronous)

2 + 2P

(1)

P = sysclk period in ns.

CAP

CAP1

EPERIPHERALS_TIMNG_01

Figure 7-27. ECAP Timings Requirements

Table 7-33. ECAP Switching Characteristics

see Figure 7-28

NO.

PARAMETER

DESCRIPTION

MIN

MAX

UNIT

CAP2

tw(APWM)

Pulse duration, APWMx high/low

-2 + 2P

(1)

P = sysclk period in ns.

APWM

CAP2

EPERIPHERALS_TIMNG_02

Figure 7-28. ECAP Switching Characteristics

For more information, see Enhanced Capture (ECAP) Module section in Peripherals chapter in the device TRM.

7.10.5.4 EPWM

Table 7-34, Table 7-35, Figure 7-29, Table 7-36, Figure 7-30, Figure 7-31, and Figure 7-32 present timing

conditions, requirements, and switching characteristics for EPWM.

AM6442, AM6441, AM6421

AM6412, AM6411

SPRSP56 – JANUARY 2021

www.ti.com

140

Submit Document Feedback

Product Folder Links: AM6442 AM6441 AM6421 AM6412 AM6411

AM6421 Datasheet(PDF) 140 Page - Texas Instruments

AM6421 Datasheet(HTML) 140 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL