AM6421 datasheet(208/237 Pages) TI

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8 Detailed Description

8.1 Overview

AM64x is an extension of the Sitara’s industrial-grade family of heterogeneous Arm processors. AM64x is built

for industrial applications, such as motor drives and programmable logic controllers (PLCs), which require a

unique combination of real-time processing and communications with applications processing. AM64x combines

two instances of Sitara’s gigabit TSN-enabled PRU-ICSSG, up to two Arm Cortex-A53 cores, up to four Cortex-

R5F MCUs and a Cortex-M4F MCU.

AM64x is architected to provide best-in-class real-time performance through the high-performance R5Fs, Tightly-

Coupled Memory banks, configurable SRAM partitioning, and low-latency paths to and from peripherals for rapid

data movement in and out of the SoC. This deterministic architecture allows for AM64x to handle the tight control

loops found in servo drives, while the peripherals like FSI, GPMC, PWMs, sigma delta decimation filters, and

absolute encoder interfaces help enable a number of different architectures found in these systems.

The Cortex-A53s provide the powerful computing elements necessary for Linux applications. Linux, and Real-

time (RT) Linux, is provided through TI’s Processor SDK Linux which stays updated to the latest Long Term

Support (LTS) Linux kernel, bootloader and Yocto file system on an annual basis. AM64x helps bridge the Linux

world with the real-time world by enabling isolation between Linux applications and real-time streams through

configurable memory partitioning. The Cortex-A53s can be assigned to work strictly out of DDR for Linux, and

the internal SRAM can be broken up into various sizes for the Cortex-R5Fs to use together or independently.

The PRU-ICSSG in AM64x provides the flexible industrial communications capability necessary to run gigabit

TSN, EtherCAT, PROFINET, EtherNet/IP, and various other protocols. In addition, the PRU-ICSSG also enables

additional interfaces in the SoC including sigma delta decimation filters and absolute encoder interfaces.

Functional safety features can be enabled through the integrated Cortex-M4F along with its dedicated

peripherals which can all be isolated from the rest of the SoC. AM64x also supports secure boot.

Note

For more information on features, subsystems, and architecture of superset device System on Chip

(SoC), see the device TRM.

AM6442, AM6441, AM6421

AM6412, AM6411

SPRSP56 – JANUARY 2021

www.ti.com

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AM6421 Datasheet(PDF) 208 Page - Texas Instruments