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K32L2AX Datasheet(PDF) 9 Page - NXP Semiconductors |
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K32L2AX Datasheet(HTML) 9 Page - NXP Semiconductors |
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9 / 96 page ![]() Table 3. Reset sources Reset sources Description POR reset • Power-on reset (POR) External global system resets • External pin reset (PIN) • Low-voltage detect (LVD) • Low leakage wakeup (LLWU) reset • Clock monitor reset sources • Stop mode acknowledge error (SACKERR) Internal Core-generated resets • Watchdog timer reset • Software reset (SW) • Lockup reset (LOCKUP) • MDM DAP system reset request Debug reset • Debug resets The CM0+ core adds support for a programmable Vector Table Offset Register (VTOR) to relocate the exception vector table after reset. This device supports booting from internal flash and RAM. The Flash Option (FOPT) register in the Flash Memory module (FTFA_FOPT) allows the user to customize the operation of the MCU at boot time. The register contains read-only bits that are loaded from the NVM's option byte in the flash configuration field. Below is boot flow chart for this device. Overview K32 L2A Microcontroller with 512 KB Flash and 128 KB SRAM, Rev. 3, 02/2021 9 NXP Semiconductors |
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