K32L2AX datasheet(11/96 Pages) NXP

11 / 96 page

2.1.6 Clock options

The SCG provides four clock sources that are then distributed and optionally divided

to the CPU, memory and various peripherals.

The four clock sources available to the SCG are:

• SOSC – output of the external oscillator (a crystal or externally applied clock

input)

• SIRC – output of the slow (2/8 Mhz) internal RC oscillator

• FIRC – output of the fast ( 48-60 MHZ) internal RC oscillator

• SPLL – output of the PLL, which is multiple of the SOSC or FIRC clock source.

The following diagram shows the clock sources and clock trees.

DIVCORE

SCG

DIVSLOW

PCC

USB

Functional

Clock

Peripherals

SOSC

FIRC

SIRC

DIV1

DIV3

DIV2

SPLL

DIVCORE_CLK

DIVSLOW_CLK

SPLLDIV1_CLK

SOSCDIV1_CLK

FIRCDIV1_CLK

SIRCDIV1_CLK

SPLLDIV3_CLK

SOSCDIV3_CLK

FIRCDIV3_CLK

SIRCDIV3_CLK

Core

DMA

Peripheral

Functional

Clocks

PLL

(VCO/2)

Figure 3. Clock distribution

Overview

K32 L2A Microcontroller with 512 KB Flash and 128 KB SRAM, Rev. 3, 02/2021

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