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68HC05JB4 Datasheet(PDF) 15 Page - Freescale Semiconductor, Inc |
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68HC05JB4 Datasheet(HTML) 15 Page - Freescale Semiconductor, Inc |
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15 / 134 page  February 24, 1999 GENERAL RELEASE SPECIFICATION MC68HC05JB4 GENERAL DESCRIPTION MOTOROLA REV 2 1-3 Figure 1-1. MC68HC05JB4 Block Diagram COND CODE REG 1 1 1 I N Z C H INDEX REG CPU CONTROL 0 0 0 STK PNTR 1 1 0 0 0 0 0 ALU 68HC05 CPU ACCUM PROGRAM COUNTER CPU REGIS- PA0 PA7 PA6 PA5 PA4/IRQ2 PA3 PA2 PA1 PB0/ICAP1 PB4/AD5 PB3/AD4 PB2 PB1 OSC 1 OSC 2 RESET IRQ (ICAP1) D+ D– VDD VSS V3.3 PC0/AD0 PC1/AD1 PC2/AD2 PC3/AD3 PC4/VRH PC5/VRL 8-bit ADC 176 Bytes RAM 3584 bytes ROM Low Speed USB 16-bit Timer Core TImer OSC ÷2 RESET and IRQ LVR VREF POWER SUPPLY shared with PB0 Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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