AS5013 datasheet(27/50 Pages) AMSCO

27 / 50 page

ams Datasheet

Page 27

[v2-00] 2021-Apr-19

Document Feedback

AS5013 − I²C Registers

Figure 27:

Y_res_int Register (11h)

Figure 28:

Xp Register (12h)

Figure 29:

Xn Register (13h)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Y[7]

Y[6]

Y[5]

Y[4]

Y[3]

Y[2]

Y[1]

Y[0]

RRRR

Reset value: 0000 0000

Bit

Bit Description

7:0

Y coordinate, Two’s complement format (signed -128 ~ +127).

Reading this register will reset the INTn output to Hi-Z after the ACK bit of Y_res_int register

readback.

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Xp[7]

Xp[6]

Xp[5]

Xp[4]

Xp[3]

Xp[2]

Xp[1]

Xp[0]

R/W

Reset value: 0000 0101 (5d)

Bit

Bit Description

7:0

Xp range value, Two’s complement (signed: -128 ~ +127).

Determines the LEFT threshold for the activation of INTn output (if output enabled), when bit

INT_function = 1 (See Figure 23).

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Xn[7]

Xn[6]

Xn[5]

Xn[4]

Xn[3]

Xn[2]

Xn[1]

Xn[0]

R/W

Reset value: 1111 1011 (-5d)

Bit

Bit Description

7:0

Xn range value, Two’s complement (signed: -128 ~ +127).

Determines the RIGHT threshold for the activation of INTn output (if output enabled), when bit

INT_function = 1 (See Figure 23).

AS5013 Datasheet(PDF) 27 Page - ams AG

AS5013 Datasheet(HTML) 27 Page - ams AG

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50

Datasheet Download

Link URL