ASL1507SHN datasheet(28/56 Pages) NXP

28 / 56 page

NXP Semiconductors

ASL1507SHN; ASL2507SHN

Single-phase and two-phase boost converter with limp-home mode

ASL1507_ASL2507

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 1 — 26 April 2018

28 / 56

8.12.2 Limp-home mode operation

Once the system enters to limp-home mode, the ASL1507SHN; ASL2507SHN

switches to the configuration as defined in the NVM memory for limp-home mode. The

ASL1507SHN; ASL2507SHN modifies the control registers accordingly.

During limp-home mode operation, the SPI interface remains functional, but only the

limp-home mode control register can be written. The other registers offer only read

access.

aaa-029699

operation

limp-home mode

reset or configuration

operation mode

LHM timer refresh

VO1 and VO2

VO1 and VO2 as set via SPI

LH_TIMER

VO1 and VO2 as set in NVM

Figure 9. Limp-home mode startup

8.12.3 Limp-home mode deactivation

To deactivate limp-home mode, a dedicated limp-home mode deactivation sequence

must be written to the limp-home mode control register (address 3Ch).

Table 42. Limp-home mode deactivation sequence

Deactivation step

Data to LIMP_EXIT[2:0]

Step 1

001

Step 2

010

Step 3

100

Limp-home refresh

111

Once the deactivation sequence is completed, the ASL1507SHN; ASL2507SHN

immediately starts to react on SPI communication. The registers remain as set for

the limp-home mode. Once the system is back to operation mode, all registers are

accessible as defined for operation mode again.

ASL1507SHN Datasheet(PDF) 28 Page - NXP Semiconductors

ASL1507SHN Datasheet(HTML) 28 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56

Datasheet Download

Link URL