SPC584BX datasheet(132/142 Pages) STMICROELECTRONICS

132 / 142 page

Revision history

SPC584Bx

132/142

DS11701 Rev 4

13-Dec-2016

(cont’d)

Section 3.17: AC Specifications:

Updated Figure 28: DSPI CMOS master mode — classic timing, CPHA = 1

Section 4: Package information:

Updated Figure 43: eTQFP64 package outline

Updated Table 61: eTQFP64 package mechanical data

Updated Table 62: eTQFP100 package mechanical data

Updated Table 64: eLQFP176 package mechanical data

Section 6: Ordering information:

Updated Figure 59: Ordering information scheme

16-Mar-2018

Section : Features

Changed core name to e200z420 (was e200z4d)

Added first bullet “AEC-Q100 qualified”

Changed document classification “Target Specification” by “Production Data”

Removed ST Restricted watermark on all document

Section 1: Introduction

Section 2: Description: Updated latest sentence with “one processor core”

(was two)

Table 2: Features list:

Updated MPU description

Added “Semaphores”

Updated “System SRAM”

Updated “DMA channels values”

Removed “Interrupt controller”

Figure 2: Periphery allocation:

Removed SEMA42 block

Section 2.3: Features overview:

Updated:

– 64 KB local data RAM for Core_2

– 8 KB I-Cache and 4 KB D-Cache for Core_2

– 128 KB on-chip general-purpose SRAM (+ 64 KB local data RAM: 64 KB

included in the CPU)

– Multi channel direct memory access controllers

Section 3: Package pinouts and signal descriptions:

Changed introduction sentence since the pin out excel file will no longer be

attached to the datasheet

Section 3: Electrical characteristics

Section 4.1: Introduction:

Removed text “The IPs and...for the details”

Removed the two notes applicable for preliminary data

Table 75. Document revision history (continued)

Date

Revision

Changes

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