ADFS5758 datasheet(34/75 Pages) AD

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ADFS5758

Data Sheet

Rev. 0 | Page 34 of 75

DEVICE FEATURES AND DIAGNOSTICS

POWER DISSIPATION CONTROL

The ADFS5758 contains integrated buck dc-to-dc converter

circuitry that controls the power supply to the output buffers,

allowing reductions in power consumption from standard

designs when using the device in both current and voltage

output modes. AVDD1 is the supply rail for the dc-to-dc converter

and can range from 7 V to 33 V. VDPC+ is derived from this rail

and its value depends on the mode of operation of the dc-to-dc

converter as well as the output load, including DPC voltage

mode, DPC current mode, and PPC current mode.

Figure 77 shows the discrete components needed for the dc-to-

dc circuitry and the following sections describe component

selection and operation of this circuitry.

LDCDC

47µH

CDCDC

2.2µF

CIN

4.7µF

AVDD1

DC-TO-DC

CONVERTER

CIRCUITRY

SW+

VDPC+

PGND1

VDPC+

PGND1

0.1µF

Figure 77. DC-to-DC Circuit

Table 10. Recommended DC-to-DC Components

Symbol

Component

Value

Manufacturer

LDCDC

LPS4018-473MRB

47 μH

Coilcraft

CDCDC

GCM31CR71H225KA55L

2.2 μF

Murata

CIN

GRM31CR71H475KA12L

4.7 μF

Murata

DC-to-DC Converter Operation

The dc-to-dc converter uses a fixed 500 kHz frequency, peak

current mode control scheme to step down the AVDD1 input to

produce VDPC+ to supply the driver circuitry of the voltage/current

output channel. The dc-to-dc converter incorporates a low-side

synchronous switch and, therefore, does not require an external

Schottky diode. The dc-to-dc converter is designed to operate

predominantly in discontinuous conduction mode (DCM),

where the inductor current goes to zero for an appreciable

percentage of the switching cycle. To avoid generating lower

frequency harmonics on the VDPC+ regulated output voltage rail,

the dc-to-dc converter does not skip any cycles. Therefore, the

dc-to-dc converter must transfer a minimum amount of energy

to its load (that is, the current or voltage output stage and its

respective load) to operate at a fixed frequency. Thus, for light

loads (for example, low RLOAD or low IOUT), the VDPC+ voltage can

rise beyond the target value and go out of regulation. This is

not a fault condition and does not represent the worst case

power dissipation condition in an application.

Note that the dc-to-dc converter requires a sufficient level of

margin to be maintained between AVDD1 and VDPC+ to ensure

the dc-to-dc circuitry operates correctly. This margin value is

5% of VDPC+ maximum.

DPC Voltage Mode

In DPC voltage mode, with the voltage output enabled or

disabled, the converter regulates the VDPC+ supply to 15 V above

the −VSENSE voltage. This mode allows the full output voltage

range to be efficiently applied across remote loads, with

corresponding remote grounds at up to ±10 V potential relative

to the local ground supply (AGND) for the ADFS5758.

DPC Current Mode

In standard current input module designs, the combined line

and load resistance values can range from typically 50 Ω to

750 Ω. Output module systems must provide enough voltage to

meet the compliance voltage requirement across the full range

of load resistor values. For example, in a 4 mA to 20 mA loop,

when driving 20 mA into a 750 Ω load, a compliance voltage of

>15 V is required. When driving 20 mA into a 50 Ω load, the

required compliance is reduced to >1 V.

In DPC current mode, the ADFS5758 dc-to-dc circuitry senses

the output voltage and regulates the VDPC+ supply voltage to meet

compliance requirements plus an optimized headroom voltage

for the output buffer. VDPC+ is dynamically regulated to 4.95 V

or (IOUT × RLOAD + headroom), whichever is greater. This regulation

excludes the light load condition whereby the VDPC+ voltage can

rise beyond the target value, which does not represent the worst

case power dissipation condition in an application. The

ADFS5758 is capable of driving up to 24 mA through a 1 kΩ

load, for a given input supply (24 V + headroom).

At low output power levels, the regulated headroom increases

above 2.3 V because the dc-to-dc circuitry uses a minimum on

time ADFS5758 cycle. This behaviour is expected and does not

impact any worse case power dissipation.

PPC Current Mode

The dc-to-dc converter can also operate in programmable power

control mode, where the VDPC+ voltage is user programmable to a

given level to accommodate the maximum output load required.

This mode represents a trade-off between the optimized power

efficiency of the DPC current mode and the settling time of a

system with a fixed supply (dc-to-dc disabled). In PPC current

mode, VDPC+ is regulated to a user-programmable level between 5 V

and 25.677 V with respect to −VSENSE (in steps of 0.667 V). This

mode is useful if settling time is an important requirement of the

design. See the DC-to-DC Converter Settling Time section. Care

is needed in selecting the programmed level of VDPC+ if the load

is nonlinear in nature. VDPC+ must be set high enough to obey the

output compliance voltage specification. If the load is unknown,

the +VSENSE input to the ADC can be used to monitor the VIOUT pin

in current mode to determine the user-programmable value at

which to set VDPC+.

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