ADFS5758 datasheet(36/75 Pages) AD

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ADFS5758

Data Sheet

Rev. 0 | Page 36 of 75

3-Wire Interface Diagnostics

Any faults on the dc-to-dc die triggers an interrupt to the main

die. An automatic status read of the dc-to-dc die is performed.

After the read transaction, the main die has a copy of the dc-to-

dc die status bits (VIOUT_OV_ERR, DCDC_P_SC_ERR and

DCDC_P_PWR_ERR). These values are available in the

ANALOG_DIAG_RESULTS register and via the OR’ed analog

diagnostic results bits in the status register. These bits also

trigger the FAULT pin.

In response to the interrupt request, the main die (master)

performs a 3-wire interface read operation to read the status of

the dc-to-dc die. The interrupt is only asserted again by a

subsequent dc-to-dc die fault flag, upon which the 3-wire

interface initiates another status read transaction. If an interrupt

signal is detected six times in a row, the interrupt detection

mechanism is disabled until a 3-wire interface write transaction

completes. This disabling prevents the 3-wire interface from

being blocked because of the constant dc-to-dc die status read

when the interrupt is toggling. The INTR_SAT_3WI flag in the

DCDC_CONFIG2 register indicates when this event occurs, and a

write to either DCDC_CONFIGx register resets this bit to 0.

During a 3-wire read or write operation, the address and data bits

in the transaction produce parity bits. These parity bits are checked

on the receive side and if they do not match on both die, the

ERR_3WI bit in the DIGITAL_DIAG_RESULTS register is set.

If the read and compare process is enabled and a parity error

occurs, the BKGND_CRC_ERR bit in the DIGITAL_DIAG_

RESULTS register is also set.

The FAULT_INJECT_3WI bits (in the GP_CONFIG2 register)

can be used to check that the 3-wire interface diagnostics are

functioning correctly.

VOLTAGE OUTPUT

Voltage Output Amplifier and VSENSE Functionality

The voltage output amplifier is capable of generating both unipolar

and bipolar output voltages, and is also capable of driving a load

of 1 kΩ in parallel with 2 µF (with an external compensation

capacitor) to AGND. Figure 78 shows the voltage output

driving a load, RLOAD, on top of a common-mode voltage (VCM)

of ±10 V. An integrated 2 MΩ resistor ensures the amplifier

loop is kept closed, thus preventing potential large destructive

voltages on VIOUT due to the broken amplifier loop in applications

where a cable can possibly become disconnected from +VSENSE. If

remote sensing of the load is not required, connect +VSENSE

directly to VIOUT and connect −VSENSE directly to AGND. Make

both connections using 1 kΩ resistors.

ADFS5758

16-BIT

DAC

+VSENSE

VIOUT

–VSENSE

VOUT

RANGE

SCALING

2MΩ

VCM

±10V

RLOAD

2MΩ

REFIN

Figure 78. Voltage Output

Driving Large Capacitive Loads

The voltage output amplifier is capable of driving capacitive

loads of up to 2 µF with the addition of a 220 pF nonpolarized

compensation capacitor. This capacitor, while allowing the

ADFS5758 to drive higher capacitive loads and reduce overshoot,

increases the settling time of the device and, therefore, affects the

bandwidth of the system. Without the compensation capacitor,

capacitive loads up to 10 nF can be driven.

Voltage Output Short-Circuit Protection

Under normal operation, the voltage output sinks/sources up to

12 mA and maintains specified operation. The short-circuit

current is typically 15 mA. If a short circuit is detected, the

FAULT pin goes low and the VOUT_SC_ERR bit in the

ANALOG_DIAG_RESULTS register is set.

FAULT PROTECTION

The ADFS5758 incorporates a line protector on the VIOUT pin,

+VSENSE pin, and −VSENSE pin. The line protector operates by

clamping the voltage internal to the line protector to the VDPC+

and AVSS rails, thereby protecting internal circuitry from

external voltage faults. If a voltage outside of these limits is

detected on the VIOUT pin, an error flag (VIOUT_OV_ERR) is

also set and is located in the ANALOG_DIAG_RESULTS register.

CURRENT OUTPUT

External Current Setting Resistor

As shown in Figure 74, RSET is an internal sense resistor that forms

part of the voltage to current conversion circuitry. The stability

of the output current value over temperature is dependent on

the stability of the value of RSET. As a method of improving the

stability of the output current over temperature, an external

13.7 kΩ low drift resistor can be connected between the RA and

RB pins of the ADFS5758, to be used instead of the internal

resistor.

Table 1 shows the performance specifications of the ADFS5758

with both the internal RSET resistor and an external, 13.7 kΩ

RSET resistor. The external RSET resistor specification assumes an

ideal resistor. The actual performance depends on the absolute

value and temperature coefficient of the resistor used. The

resistor specifications, therefore, directly affect the gain error of

the output and the TUE.

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