ADFS5758 datasheet(62/75 Pages) AD

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ADFS5758

Data Sheet

Rev. 0 | Page 62 of 75

Bits

Bit Name

Description

Reset

Access

11: enable voltage comparators. Note that the INT_EN bit in the DAC_ CONFIG

available to the REFIN comparator.

VLDO_CAP_DETECT_EN

Initiates a diagnostic test to detect a missing external capacitor on the VLDO pin.

Note that this bit returns to 0 once the test is complete and thus, polling this bit

can be used to determine when the test is complete.

0x0

R/W

0: disable (default).

1: enable.

RESERVED

Reserved.

0x0

R/W

GLOBAL_SW_LDAC

When enabled, the ADFS5758 address bits are ignored when performing a

software LDAC command, enabling multiple devices to be simultaneously

updated using one SW_LDAC command.

0x0

R/W

0: disable (default).

1: enable.

FAULT_TIMEOUT

Enable reduced fault detect timeout. This bit configures the delay from when the

analog block indicates a VIOUT fault has been detected to the associated change

of the relevant bit in the ANALOG_DIAG_RESULTS register. This feature provides

flexibility to accommodate a variety of output load values.

0x1

R/W

0: fault detect timeout = 25 ms.

1: fault detect timeout = 6.5 ms (default).

[8:5]

FAULT_INJ_3WI

3WI Fault Injection Enable. All unlisted codes are reserved and must not be selected.

0x0

R/W

0000: no 3WI fault injection (default).

0100: enable fault injection on 3-wire interface by forcing DCLK low.

DAC_LATCH_MON_

FAULT_INJ

If this bit is enabled, the signal output from the DAC is changed, which triggers

the DAC_LATCH_MON_ERR bit in the DIGITAL_DIAG_RESULTS register.

0x0

R/W

0: disable (default).

1: enable.

DUAL_CAL_FAULT_INJ

If this bit is enabled, a bit is input to the internal DAC controller circuitry, which

causes an error in the internal DAC calibration calculation. This causes the two

calculations in the subsequent dual calibration test to disagree and flag the error

via the DUAL_CAL_ERR bit in the DIGITAL_DIAG_RESULTS register.

0x0

R/W

0: disable (default).

1: enable.

INVERSE_DAC_CHECK_

FAULT_INJ

If this bit is enabled, a bit is input to the internal DAC controller circuitry, which

causes an error in the DAC inverse calculation. This causes the INVERSE_DAC_

CHECK_ERR flag to set in the DIGITAL_DIAG_RESULTS register when completing

the subsequent calculation.

0x0

R/W

0: disable (default).

1: enable.

BKGND_CRC_FAULT_INJ

If this bit is enabled, a fault is injected into one of the bits that is used to build

the CRC which is checked against the ideal CRC. This is flagged by the BKGND_

CRC_ERR bit in the DIGITAL_DIAG_RESULTS register upon completion of the

subsequent background CRC check.

0x0

R/W

0: disable (default).

1: enable.

SPI_READ_FAULT_INJ

If this bit is enabled, the MSB of the SPI readback frame flips to ensure mismatch

between the read data and the read CRC bits for the subsequent SPI readback

operation. This is flagged by the SPI_CRC_ERR in the DIGITAL_DIAG_RESULTS

0x0

R/W

0: disable (default).

1: enable.

ADFS5758 Datasheet(PDF) 62 Page - Analog Devices

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