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ADFS5758 Datasheet(PDF) 71 Page - Analog Devices

Part # ADFS5758
Description  Single-Channel, 16-Bit, Current/Voltage Output DAC, Functional Safety Approved for Unipolar Current Output
PDF  75 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADFS5758 Datasheet(HTML) 71 Page - Analog Devices

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Data Sheet
ADFS5758
Rev. 0 | Page 71 of 75
Status Register
Address: 0x16, Reset: 0x160000, Name: Status
This register contains ADC data and status bits, as well as the WDT, OR'ed analog and digital diagnostics, and the FAULT pin status bits.
Table 48. Bit Descriptions for Status
Bits
Bit Name
Description
Reset
Access
21
FAULT_PIN_STATU
S
The FAULT_PIN_STATUS bit reflects the inverted current status of the FAULT pin.
0x0
R
20
DIG_DIAG_STATUS
This bit represents the result of a logical OR of the contents of Bits[15:0] in the
DIGITAL_DIAG_RESULTS register, with the exception of the SLEW_BUSY bit. Therefore,
if any of these bits are high, the DIG_DIAG_STATUS bit is high. Note that this bit is high
on power-up due to the active RESET_OCCURRED flag. A quiet mode is also available
(SPI_DIAG_QUIET_EN in the GP_CONFIG1 register), such that the logical OR function
only incorporates Bits[D15:D3] of the DIGITAL_DIAG_RESULTS register (with the
exception of the SLEW_BUSY bit). If an SPI CRC, SPI slip bit, or SCLK count error occurs,
the DIG_DIAG_STATUS bit is not set high.
0x1
R
19
ANA_DIAG_STATU
S
This bit represents the result of a logical OR of the contents of Bits[13:0] in the
ANALOG_DIAG_RESULTS register. Therefore, if any bit in this register is high, the
ANA_DIAG_STATUS bit is high.
0x0
R
18
WDT_STATUS
WDT status bit.
0x0
R
17
ADC_BUSY
ADC busy status bit.
0x0
R
[16:12]
ADC_CH
Address of the ADC channel represented by the ADC_DATA bits in the status register.
0x0
R
[11:0]
ADC_DATA
12 bits of ADC data representing the converted signal addressed by the ADC_CH bits,
Bits[4:0].
0x0
R
Chip ID Register
Address: 0x17, Reset: 0x170101, Name: CHIP_ID
This register contains the silicon revision ID of both the main die and the dc-to-dc die.
Table 49. Bit Descriptions for CHIP_ID
Bits
Bit Name
Description
Reset
Access
21
FAULT_PIN_STATUS
The FAULT_PIN_STATUS bit reflects the inverted current status of the FAULT pin.
0x0
R
[20:16]
REGISTER_ADDRESS
Register address.
0x0
R
[15:11]
Reserved
Reserved.
0x0
R0
[10:8]
DCDC_DIE_CHIP_ID
These bits reflect the revision number of the dc-to-dc die.
0x2
R
[7:0]
MAIN_DIE_CHIP_ID
These bits reflect the revision number of the main die.
0x2
R
Frequency Monitor Register
Address: 0x18, Reset: 0x180000, Name: FREQ_MONITOR
An internal frequency monitor uses the internal oscillator (MCLK) to create a pulse at a frequency of 1 kHz (MCLK/10,000). This pulse
is used to increment a 16-bit counter. The value of the counter is available to read in the FREQ_MONITOR register. The user can poll
this register periodically and use it both as a diagnostic tool for the internal oscillator (to monitor that the oscillator is running) and to measure
the frequency. This feature is enabled by default via the FREQ_MON_EN bit in the DIGITAL_DIAG_CONFIG register, and allows a
robustness check of the internal oscillator.
Table 50. Bit Descriptions for FREQ_MONITOR
Bits
Bit Name
Description
Reset
Access
21
FAULT_PIN_STATUS
The FAULT_PIN_STATUS bit reflects the inverted current status of the FAULT pin.
0x0
R
[20:16]
REGISTER_ADDRESS
Register address.
0x0
R
[15:0]
FREQ_MONITOR
Internal clock counter value.
0x0
R



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