CS47L35 datasheet(209/300 Pages) CIRRUS

209 / 300 page

DS1085F3

209

CS47L35

4.17 Control Interface

The control interface also supports other register operations; the interface protocol for these operations is shown in

Fig. 4-70 through Fig. 4-73. The terminology used in the following figures is detailed in Table 4-101.

Note that 16-bit data words are shown in these illustrations. The equivalent protocol is also applicable to 32-bit words, with

4 data bytes transmitted (or received) instead of 2.

Fig. 4-70 shows a single register write to a specified address.

Figure 4-70. Single-Register Write to Specified Address

Fig. 4-71 shows a single register read from a specified address.

Figure 4-71. Single-Register Read from Specified Address

Fig. 4-72 shows a multiple register write to a specified address.

Figure 4-72. Multiple-Register Write to Specified Address

Table 4-101. Control Interface (I2C) Terminology

Terminology

Description

Start condition

Repeated start

Acknowledge (SDA low)

Not acknowledge (SDA high)

Stop condition

R/W

Read/not write

0 = Write; 1 = Read

[White field]

Data flow from bus master to CS47L35

[Gray field]

Data flow from CS47L35 to bus master

Device ID

Address Byte [3]

(0)

8-Bit Device ID

8 bits

Address Byte [2]

8 bits

Address Byte [1]

8 bits

MSByte Data

LSByte Data

8 bits

Address Byte [0]

(Most Significant Byte)

(Least Significant Byte )

R/W

Device ID

(0)

Device ID

MSByte Data

(1)

LSByte Data

Address Byte [3]

Address Byte [2]

Address Byte [1]

Address Byte [0]

(Most Significant Byte)

(Least Significant Byte )

R/W

Device ID

Address Byte [3]

(0)

MSByte Data 0

LSByte Data 0

Written to Register Address

MSByte Data N

LSByte Data N

Written to Register Address + N

MSByte Data N-1

LSByte Data N-1

Written to Register Address + N - 1

Address Byte [2]

Address Byte [1]

Address Byte [0]

MSByte Data 1

LSByte Data 1

Written to Register Address + 1

R/W

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