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CS47L35 Datasheet(PDF) 222 Page - Cirrus Logic

Part # CS47L35
Description  Smart Codec with Low-Power Audio DSP
PDF  300 Pages
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Manufacturer  CIRRUS [Cirrus Logic]
Direct Link  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS47L35 Datasheet(HTML) 222 Page - Cirrus Logic

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DS1085F3
CS47L35
4.19 Charge Pumps, Regulators, and Voltage Reference
Table 4-113 lists the LDO2 voltage control settings.
R537 (0x0219)
Mic_Bias_Ctrl_2
15 MICB2_EXT_CAP
0
Microphone Bias 2 External Capacitor (when MICB2_BYPASS = 0). Configures the
MICBIAS2 regulator according to the specified capacitance connected to the
MICBIAS2x outputs.
0 = No external capacitor
1 = External capacitor connected
8:5 MICB2_LVL[3:0]
0x7
Microphone Bias 2 Voltage Control (when MICB2_BYPASS = 0)
0x0 = 1.5 V
0x1 = 1.6 V
… (0.1-V steps)
0xC = 2.7 V
0xD to 0xF = 2.8 V
3
MICB2_RATE
0
Microphone Bias 2 Rate (Bypass Mode)
0 = Fast start-up/shutdown
1 = Pop-free start-up/shutdown
2
MICB2_DISCH
1
Microphone Bias 2 Discharge
0 = MICBIAS2 floating when disabled
1 = MICBIAS2 discharged when disabled
1
MICB2_BYPASS
1
Microphone Bias 2 Mode
0 = Regulator Mode
1 = Bypass Mode
0
MICB2_ENA
0
Microphone Bias 2 Enable
0 = Disabled
1 = Enabled
R540 (0x021C)
Mic_Bias_Ctrl_5
5
MICB1B_DISCH
0
Microphone Bias 1B Discharge
0 = MICBIAS1B floating when disabled
1 = MICBIAS1B discharged when disabled
4
MICB1B_ENA
0
Microphone Bias 1B Enable
0 = Disabled
1 = Enabled
1
MICB1A_DISCH
0
Microphone Bias 1A Discharge
0 = MICBIAS1A floating when disabled
1 = MICBIAS1A discharged when disabled
0
MICB1A_ENA
0
Microphone Bias 1A Enable
0 = Disabled
1 = Enabled
R542 (0x021E)
Mic_Bias_Ctrl_6
5
MICB2B_DISCH
0
Microphone Bias 2B Discharge
0 = MICBIAS2B floating when disabled
1 = MICBIAS2B discharged when disabled
4
MICB2B_ENA
0
Microphone Bias 2B Enable
0 = Disabled
1 = Enabled
1
MICB2A_DISCH
0
Microphone Bias 2A Discharge
0 = MICBIAS2A floating when disabled
1 = MICBIAS2A discharged when disabled
0
MICB2A_ENA
0
Microphone Bias 2A Enable
0 = Disabled
1 = Enabled
1.See Table 4-113 for LDO2 output voltage definition.
Table 4-113. LDO2 Voltage Control
LDO2_VSEL[5:0]
LDO Output
LDO2_VSEL[5:0]
LDO Output
LDO2_VSEL[5:0]
LDO Output
0x00
0.900 V
0x10
1.300 V
0x20
2.600 V
0x01
0.925 V
0x11
1.325 V
0x21
2.700 V
0x02
0.950 V
0x12
1.350 V
0x22
2.800 V
0x03
0.975 V
0x13
1.375 V
0x23
2.900 V
0x04
1.000 V
0x14
1.400 V
0x24
3.000 V
0x05
1.025 V
0x0E
1.250 V
0x1C
2.200 V
Table 4-112. Charge-Pump and LDO Control Registers (Cont.)
Register Address Bit
Label
Default
Description



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