CS47L35 datasheet(218/300 Pages) CIRRUS

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218

DS1085F3

CS47L35

4.19 Charge Pumps, Regulators, and Voltage Reference

The CS47L35 incorporates two charge-pump circuits and an LDO-regulator circuit to generate supply rails for internal

functions and to support external microphone requirements. The CS47L35 also provides two MICBIAS generators (with

four switchable outputs), which provide low noise reference voltages suitable for biasing ECM-type microphones or

powering digital microphones.

Refer to Section 5.1 for recommended external components.

The CPVDD1 domain (1.8 V) powers the Charge Pump 1 and Charge Pump 2 circuits. The CPVDD2 power domain

(1.2 V) is an additional supply used by Charge Pump 1 only.

4.19.1 Charge Pump 1

Charge Pump 1 (CP1) is used to generate the positive and negative supply rails for the analog output drivers. CP1 is

enabled automatically by the CS47L35 when required by the output drivers.

The Charge Pump 1 circuit is shown in Fig. 4-74.

4.19.2 Charge Pump 2 and LDO2 Regulator

Charge Pump 2 (CP2) powers LDO2, which provides the supply rail for analog input circuits and for the MICBIAS

generators. CP2 and LDO2 are enabled by setting CP2_ENA.

The 32-kHz clock must be configured and enabled when using CP2. See Section 4.16 for details of the system clocks.

When CP2 and LDO2 are enabled, the MICVDD voltage is selected using the LDO2_VSEL field. Note that, when one or

more of the MICBIAS generators is operating in normal (regulator) mode, the MICVDD voltage must be at least 200 mV

greater than the highest selected MICBIASn output voltages.

When CP2 and LDO2 are enabled, an internal bypass path may be selected, connecting the MICVDD pin directly to the

CPVDD1 supply. This path is controlled using the CP2_BYPASS bit. Note that the bypass path is only supported when

CP2 is enabled.

When CP2 is disabled, the CP2VOUT pin can be configured to be floating or to be actively discharged. This is selected

using the CP2_DISCH bit.

When LDO2 is disabled, the MICVDD pin can be configured to be floating or to be actively discharged. This is selected

using the LDO2_DISCH bit.

The MICVDD pin is connected to the output of LDO2. Note that the MICVDD does not support direct connection to an

external supply; MICVDD is always powered internally to the CS47L35.

The Charge Pump 2 and LDO2 Regulator circuits are shown in Fig. 4-74. The associated control bits are described in

Table 4-112.

Note that decoupling capacitors and flyback capacitors are required for these circuits. Refer to Section 5.1 for

recommended external components.

4.19.3 Microphone Bias (MICBIAS) Control

There are two MICBIAS generators, which provide low-noise reference voltages suitable for biasing ECM-type

microphones or powering digital microphones. Refer to Section 5.1.3 for recommended external components.

Table 4-111. Write Sequencer Memory Allocation

Description

Sequence Index Range

Default Sequences

0 to 114

User Space

115 to 223

Boot Sequence

224 to 251

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