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CS47L35 Datasheet(PDF) 214 Page - Cirrus Logic |
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CS47L35 Datasheet(HTML) 214 Page - Cirrus Logic |
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214 / 300 page ![]() 214 DS1085F3 CS47L35 4.18 Control-Write Sequencer The DRC signal-detect control sequences are undefined following power-on reset, a hardware reset, or a Sleep Mode transition. The DRC signal-detect control sequences must be reconfigured by the host processor following any of these events. Note that all control sequences are maintained in the sequencer memory through software reset. See Section 4.3.5 for further details of the DRC function. 4.18.4 MICDET Clamp Sequences The CS47L35 supports external accessory detection functions, including the MICDET clamp circuit. The MICDET clamp status can be used to trigger the control-write sequencer. The MICDET clamp is controlled by the JD1 and/or JD2 signals, as described in Table 4-75. A control-write sequence can be associated with a rising edge and/or a falling edge of the MICDET clamp status. This is configured using the fields described in Table 4-75. If one of the selected logic conditions is detected, the control-write sequencer is triggered. The applicable start index location within the sequencer memory is separately configurable for the rising and falling edge conditions. The WSEQ_MICD_CLAMP_RISE_INDEX field defines the sequencer start index corresponding to a MICDET clamp rising edge (clamp active) event, as described in Table 4-105. The WSEQ_MICD_CLAMP_FALL_INDEX field defines the sequencer start index corresponding to a MICDET clamp falling edge event. Note that a sequencer start index of 0x1FF causes the respective sequence to be aborted. The MICDET clamp control sequences are undefined following power-on reset, a hardware reset, or a Sleep Mode transition. The MICDET clamp control sequences must be reconfigured by the host processor following any of these events. Note that all control sequences are maintained in the sequencer memory through software reset. See Section 4.12 for further details of the MICDET clamp status signals. 4.18.5 Event Logger Sequences The CS47L35 provides four event log functions, for monitoring and recording internal or external signals. The logged events are held in a FIFO buffer, from which the application software can read details of the detected logic transitions. The control-write sequencer is automatically triggered whenever the NOT_EMPTY status of the event log buffer is asserted. A different control sequence may be configured for each of the event loggers. The WSEQ_EVENTLOGn_INDEX field defines the sequencer start index corresponding to respective event logger (where n is 1 to 4), as described in Table 4-106. Table 4-104. Write Sequencer Control—DRC Signal-Detect Register Address Bit Label Default Description R110 (0x006E) Trigger_ Sequence_ Select_32 8:0 WSEQ_DRC1_ SIG_DET_RISE_ INDEX[8:0] 0x1FF DRC1 Signal-Detect (Rising) Write Sequence start index. Contains the index location in the sequencer memory of the first command in the sequence associated with DRC1 Signal-Detect (Rising) detection. Valid from 0 to 251 (0x0FB). R111 (0x006F) Trigger_ Sequence_ Select_33 8:0 WSEQ_DRC1_ SIG_DET_FALL_ INDEX[8:0] 0x1FF DRC1 Signal-Detect (Falling) Write Sequence start index. Contains the index location in the sequencer memory of the first command in the sequence associated with DRC1 Signal-Detect (Falling) detection. Valid from 0 to 251 (0x0FB). Table 4-105. Write Sequencer Control—MICDET Clamp Register Address Bit Label Default Description R102 (0x0066) Always_On_Triggers_ Sequence_Select_1 8:0 WSEQ_MICD_ CLAMP_RISE_ INDEX[8:0] 0x1FF MICDET Clamp (Rising) Write Sequence start index. Contains the index location in the sequencer memory of the first command in the sequence associated with MICDET clamp (Rising) detection. Valid from 0 to 251 (0x0FB). R103 (0x0067) Always_On_Triggers_ Sequence_Select_2 8:0 WSEQ_MICD_ CLAMP_FALL_ INDEX[8:0] 0x1FF MICDET Clamp (Falling) Write Sequence start index. Contains the index location in the sequencer memory of the first command in the sequence associated with MICDET clamp (Falling) detection. Valid from 0 to 251 (0x0FB). |
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