STM32W108HB datasheet(220/278 Pages) STMICROELECTRONICS

220 / 278 page

Analog-to-digital converter

STM32W108HB STM32W108CC STM32W108CB STM32W108CZ

220/278

Doc ID 16252 Rev 14

11.1.4

Offset/gain correction

When a conversion is complete, the 16-bit converted data is processed by offset/gain

correction logic:

●

The basic ADC conversion result is added to the 16-bit signed (two’s complement)

value of the ADC offset register (ADC_OFFSETR).

●

The offset-corrected data is multiplied by the 16-bit ADC gain register, ADC_GAINR, to

produce a 16-bit signed result. If the product is greater than 0x7FFF (32767), or less

than 0x8000 (-32768), it is limited to that value and the SAT bit is set in the ADC_ISR

●

The offset/gain corrected value is divided by two to produce the final result.

ADC_GAINR is an unsigned scaled 16-bit value: GAIN[15] is the integer part of the gain

factor and GAIN[14:0] is the fractional part. As a result, ADC_GAINR values can represent

gain factors from 0 through (2 – 2-15).

Reset initializes the offset to zero (ADC_OFFSETR = 0) and gain factor to one

(ADC_GAINR = 0x8000).

For the STM32W108CC and STM32108CZ devices, a software mechanism is used to

measure and cancel the HV buffer offset.

The HV offset calculation requires two measurements with respectively CHOP = 1 and

CHOP = 0.

The HV offset values is then calculated as follows:

HV_buf_out

()

HV_buf_out

()

–

()

where:

(HV_buf_out)0 and (HV_buf_out)1 are the outputs of the HV buffer (input of the ADC).

11.1.5

DMA

The ADC DMA channel writes converted data, which incorporates the offset/gain correction,

into a DMA buffer in RAM.

The ADC DMA buffer is defined by two registers:

●

ADC_DMAMSAR is the start address of the buffer and must be even.

●

ADC_DMANDTR specifies the size of the buffer in 16-bit samples, or half its length in

bytes.

To prepare the DMA channel for operation, reset it by writing the RST bit in the

ADC_DMACR register, then start the DMA in either linear or auto wrap mode by setting the

LOAD bit in the ADC_DMACR register. The AUTOWRAP bit in the ADC_DMACR register

selects the DMA mode: 0 for linear mode, 1 for auto wrap mode.

●

In linear mode the DMA writes to the buffer until the number of samples given by

ADC_DMANDTR has been output. Then the DMA stops and sets the DMABF bit in the

ADC_ISR register. If another ADC conversion completes before the DMA is reset or the

ADC is disabled, the DMAOVF bit in the ADC_ISR register is set.

●

In auto wrap mode the DMA writes to the buffer until it reaches the end, then resets its

pointer to the start of the buffer and continues writing samples. The DMA transfers

continue until the ADC is disabled or the DMA is reset.

STM32W108HB Datasheet(PDF) 220 Page - STMicroelectronics

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