Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.NET

X  

Preview PDF HTML

STM32U535NET6QTR Datasheet(PDF) 216 Page - STMicroelectronics

Part # STM32U535NET6QTR
Description  Ultra-low-power Arm® Cortex®-M33 MCUTrustZone®FPU,240 DMIPS, up to 512 KB flash memory, 274 KB SRAM
PDF  278 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32U535NET6QTR Datasheet(HTML) 216 Page - STMicroelectronics

Back Button STM32U535NET6QTR Datasheet HTML 212Page - STMicroelectronics STM32U535NET6QTR Datasheet HTML 213Page - STMicroelectronics STM32U535NET6QTR Datasheet HTML 214Page - STMicroelectronics STM32U535NET6QTR Datasheet HTML 215Page - STMicroelectronics STM32U535NET6QTR Datasheet HTML 216Page - STMicroelectronics STM32U535NET6QTR Datasheet HTML 217Page - STMicroelectronics STM32U535NET6QTR Datasheet HTML 218Page - STMicroelectronics STM32U535NET6QTR Datasheet HTML 219Page - STMicroelectronics STM32U535NET6QTR Datasheet HTML 220Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 216 / 278 page
background image
Electrical characteristics
STM32U535xx
216/278
DS14217 Rev 1
Table 103. 14-bit ADC1 accuracy(1)(2)
Symbol
Parameter
Conditions(3)
Min
Typ
Max
Unit
ET
Total unadjusted error
Single ended
-
±25
-
LSB
Differential
-
±28
-
EO
Offset error
Single ended
-
±2
±5(4)
Differential
-
±5
±10(4)
EG
Gain error
Single ended
-
±6
-
Differential
-
±3
ED
Differential linearity error
Single ended
fADC ≥ 10 MHz
-
-0.9/+1.5
-0.9/+2.5
Differential
-
Single ended
fADC < 10 MHz
-
-0.9/+1.5
-1/+3
Differential
-
EL
Integral linearity error
Single ended
-
±2
±5
Differential
-
ENOB
Effective number of bits
Single ended
11
12
-
bits
Differential
11.8
12.8
-
SINAD
Signal-to-noise and
distortion ratio
Single ended
68
74
-
dB
Differential
73
78
-
SNR
Signal-to-noise ratio
Single ended
68
74
-
Differential
73
78
-
THD
Total harmonic distortion
Single ended
-
-84
-80
Differential
-
-95
-89
1. Evaluated by characterization for BGA packages. Not tested in production. The values for LQFP packages may differ.
2. ADC DC accuracy values are measured after the internal calibration.
3. The I/O analog switch voltage booster is enable when VDDA < 2.4 V (BOOSTEN = 1 in SYSCFG_CFGR1 when
VDDA < 2.4 V). The booster is disabled when VDDA ≥ 2.4 V. Resolution = 14 bits, no oversampling.
4. This parameter may degrade in case of digital activity on adjacent I/Os.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com