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FS32R274VCK2VMM Datasheet(PDF) 32 Page - NXP Semiconductors

Part # FS32R274VCK2VMM
Description  S32R274/S32R264 Series Data Sheet
PDF  78 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

FS32R274VCK2VMM Datasheet(HTML) 32 Page - NXP Semiconductors

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Table 25. ADC conversion characteristics (continued)
Symbol
Parameter
Conditions1
Min
Typ
Max
Unit
TUEIS1WINJ Total unadjusted error for IS1WINJ
–6
—
6
LSB
TUEIS1WWINJ Total unadjusted error for IS1WWINJ
–6
—
6
LSB
IS1WINJ (pad
going to one
ADC)
(single ADC channel)
Max leakage
150 °C
—
—
250
nA
Max positive/negative injection
–3
—
38
mA
IS1WWINJ
(pad going to
two ADCs)
(double ADC channel)
Max leakage
150 °C
—
—
300
nA
Max positive/negative injection 7
|Vref_ad0 - Vref_ad1| < 150 mV
–3.6
—
3.6
mA
SNR
Signal-to-noise ratio
3.3 V reference voltage
67
—
—
dB
THD
Total harmonic distortion
@ 50 KHz
65
—
—
dB
SINAD
Signal-to-noise and distortion
Fin < 50 KHz
6.02 x ENOB + 1.76
dB
ENOB
Effective number of bits
Fin < 50 KHz
10.5
—
—
bits
1. VDD_HV_ADC = 3.3 V -5%,+10%, TJ = –40 to +150°C, unless otherwise specified and analog input voltage from VAGND to
VDD_HV_ADCREFx.
2. AD_CK clock is always half of the ADC module input clock defined via the auxiliary clock divider for the ADC.
3. During the sample time the input capacitance CS can be charged/discharged by the external source. The internal
resistance of the analog source must allow the capacitance to reach its final voltage level within tsample. After the end of the
sample time tsample, changes of the analog input voltage have no effect on the conversion result. Values for the sample
clock tsample depend on programming.
4. This parameter does not include the sample time tsample, but only the time for determining the digital result and the time to
load the result register with the conversion result.
5. SeeInput equivalent circuit figure.
6. No missing codes.
7. ADC specifications are met only if injection is within these specified limits
8. Max injection current for all ADC IOs is ± 10 mA
NOTE
The ADC performance specifications are not guaranteed if two
ADCs simultaneously sample the same shared channel. Aurora
interface along with SAR-ADC would degrade SAR-ADC
performance. General Purpose Input (GPI) functionality should
not be used on any of the SAR-ADC channels when SARADC
is functional.
Analog modules
S32R274/S32R264 Series Data Sheet, Rev. 6, 06/2021
32
NXP Semiconductors



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