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FS32R274VCK2VMM Datasheet(PDF) 51 Page - NXP Semiconductors |
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FS32R274VCK2VMM Datasheet(HTML) 51 Page - NXP Semiconductors |
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51 / 78 page ![]() Data Valid pad_p/pad_n Differential TX Data Lines H L Tsu lfast_pwr_down Figure 22. Power-down exit time Differential TX Data Lines pad_p/pad_n Trise Tfall 90% 10% VIH VIL Figure 23. Rise/fall time 9.3.2 LFAST interface electrical characteristics NOTE While LFAST is operating and 'Ready' (nex_rdy_b) signal is used by the debugger on PAD_132, the recommended SRE settings are ‘00' and ‘01'. TCK should be used with low frequency (preferably less than 10 MHz). Table 42. LFAST electrical characteristics Symbol Parameter Conditions1 Value Unit Min Typ Max Data Rate DATARATE Data rate — — 312/320 Typ+0.1% Mbps STARTUP TSTRT_BIAS Bias startup time2 — — 0.5 3 µs Table continues on the next page... Communication modules S32R274/S32R264 Series Data Sheet, Rev. 6, 06/2021 NXP Semiconductors 51 |
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