FS32R274VCK2VMM datasheet(68/78 Pages) NXP

68 / 78 page

14.1.5 Data to clock timing

Figure 41. Definition

Table 54. Data to clock timing specifications

Symbol

Parameter

Min

Typ

Max

Unit

TCLKP

Clock Period

500

MHz

UIINST

UI Instantaneuous

12.5

TSETUP

Data to Clock Setup Time

0.15

UIINST

THOLD

Clock to Data Hold Time

0.15

UIINST

14.2 MIPICSI2 Disclaimer

The material contained herein is not a license, either expressly or impliedly, to any IPR

owned or controlled by any of the authors or developers of this material or MIPI®. The

material contained herein is provided on an “AS IS” basis and to the maximum extent

permitted by applicable law, this material is provided AS IS AND WITH ALL FAULTS,

and the authors and developers of this material and MIPI hereby disclaim all other

warranties and conditions, either express, implied or statutory, including, but not limited

to, any (if any) implied warranties, duties or conditions of merchantability, of fitness for a

particular purpose, of accuracy or completeness of responses, of results, of workmanlike

effort, of lack of viruses, and of lack of negligence.

Radar module

S32R274/S32R264 Series Data Sheet, Rev. 6, 06/2021

NXP Semiconductors

FS32R274VCK2VMM Datasheet(PDF) 68 Page - NXP Semiconductors