DSP96002UMSLASHAD datasheet(43/111 Pages) NXP

43 / 111 page

Specifications

AC Electrical Characteristics

MOTOROLA

DSP96002/D, Rev. 2

2-21

115

HS, HA Deasserted to TS Asserted

(Setup)

1—0—0—

118

HA Width Asserted (DMA Mode)

—

120

CLK Low to HR Asserted

—

121

TS, HA Asserted to HR Deasserted

—

122

CLK Low to HR Asserted After TS

Deassertion12

60—50—40—ns

123

TS, HA Deasserted to CLK Low

(Setup)14

9.5

Note:

The numbers in this column are shown as circled numbers in the following figures.

DC Electrical Characteristics:

at 33.3 MHz:

VCC = 5.0 V ± 10%, GND = 0 V DC, TJ = –40°C to 100°C

at 40 or 60 MHz: VCC = 5.0 V ± 5%, GND = 0 V DC, TJ = –40°C to 100°C

Assuming duty cycle in the range 46.7%–53.3%

Assuming duty cycle in the range 46%–54%

When reading status (ICS register), the status data is guaranteed to be stable.

2Tc + 40

2Tc + 38

Assuming both TX and HRX empty

2Tc + Tl + 5

10. 2Tc + Tl + 3

11. Both TS and HA must be deasserted in case of mixed DMA / non-DMA accesses (i.e., after any

access this recovery time must be respected before a new access.)

12. When TS deassertion was in respect to timing 123

13. 2Tc

14. When timing 123 is respected, timing 122 is guaranteed to be respected. Timing 123 is not required

for correct operation.

15. Tc

Table 2-9

Host Timing (Continued)

No.1

Characteristic2

33.3 MHz3

40 MHz4

60 MHz4

Unit

Min Max Min Max Min Max

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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