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DP83255AVF Datasheet(PDF) 8 Page - National Semiconductor (TI) |
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DP83255AVF Datasheet(HTML) 8 Page - National Semiconductor (TI) |
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8 / 96 page  30 Functional Description (Continued) 32 TRANSMITTER BLOCK The Transmitter Block accepts 10-bit bytes from the Config- uration Switch The Transmitter Block performs the following operations Encodes the data from 4B to 5B coding Filters out code violations from the data stream Is capable of generating Idle Master Halt Quiet or oth- er user defined symbol pairs Converts the data stream from NRZ to NRZI ready for transmission Serializes data During normal operation the Transmitter Block presents se- rial data to the fiber optic transmitter While in the External Loopback mode the Transmitter Block presents serial data to the Clock Recovery Device The Transmitter Block consists of the following functional blocks Data Registers Parity Checker 4B5B Encoder Repeat Filter Smoother Line State Generator Injection Control Logic Shift Register NRZ to NRZI Encoder See Figure 3-2 TLF10386 – 4 FIGURE 3-2 Transmitter Block Diagram 8 |
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