AD9923ABBCZ datasheet(63/88 Pages) AD

63 / 88 page

AD9923A

Rev. 0 | Page 63 of 88

CIRCUIT LAYOUT INFORMATION

The AD9923A typical circuit connections are shown in Figure 82.

The PCB layout is critical for achieving good image quality from

the AD9923A. All supply pins, particularly the pins for the AVDD,

TCVDD, RGVDD, and HVDD supplies, must be decoupled to

ground with quality, high frequency chip capacitors.

The decoupling capacitors should be as close as possible to the

supply pins and have a very low impedance path to a continuous

ground plane. There should be a bypass capacitor of at least

4.7 μF for each main supply—AVDD, HVDD, and DRVDD—

but this is not necessary for each individual pin. In most

applications, it is easier to share the supply for RGVDD and

HVDD; this requires bypassing each supply pin separately. A

separate 3 V supply can also be used for DRVDD, but it should

be decoupled to the same ground plane as the rest of the chip. A

separate ground for DRVSS is not recommended.

The analog bypass pins (REFT and REFB) should be carefully

decoupled to ground, as close as possible to their respective

pins. The analog input (CCDIN) capacitor should also be

located close to the pin.

To avoid excessive distortion of the signals, design the HL, H1

to H4, and RG traces to have low inductance. To minimize

mutual inductance, route the complementary signals, H1 and

H2, as symmetrically and close together as possible. The same

should be done for the H3 and H4 signals. Heavier PCB traces

are recommended because of the large transient current

demand placed by the CCD on HL and H1 to H4. If possible,

physically locating the AD9923A closer to the CCD reduces the

inductance on these lines. The routing path should be as direct

as possible from the AD9923A to the CCD.

The AD9923A also contains an on-chip oscillator for driving an

external crystal. The maximum crystal frequency that the

AD9923A can support is 36 MHz. Figure 80 shows an example

application using a typical 24 MHz crystal. For the exact values

of the external resistors and capacitors, see the crystal

manufacturer’s data sheet.

10pF~20pF

CLI (H12)

CLO (J12)

AD9923A

24MHz

XTAL

~2MΩ

~375Ω

Figure 80. Crystal Driver Application

VDD

V5V

VDR_EN

Figure 81. AD9923A Recommended Power up Sequence

AD9923ABBCZ Datasheet(PDF) 63 Page - Analog Devices

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