Data Sheet G14309EJ2V0DS00

29

µµµµPC1909

4.9 Output Circuit

The output circuit is a totem-pole output with a peak output current rating (I C(peak)) of 1.2 A. Although a power MOS FET

can be driven directly, be careful not to exceed the allowable loss of the

µPC1909 when the input capacitance of the

power MOS FET is large or the operating frequency is high. The switching speed of the power MOS FET is determined by

the charge/discharge current of the gates and the charge of the power MOS FET’s gates. Be sure, however, to insert a

series resistor at the gates of the power MOS FET to avoid exceeding the peak output current rating of the

µPC1909.

Note that the heat generated in the

µPC1909 by the output current is determined by the charge at the gates of the power

MOS FET, and is not related to the switching speed.

When the 2SK1954 is used, for example, the loss of the

µPC1909 (Pd) can be determined as follows,

when the gate drive voltage VGS

≅ VOUT1 = 10 V and

the oscillation frequency fOSC = 200 kHz,

as shown in the gate charge graph on the right (Figure 4-13):

Pd = QG · VGS · fOSC

=10 [nC] x 10 [V] x 200 [kHz]

=0.02 [W]

Moreover, when the

µPC1909 and the power MOS FET are

separated, the wiring from the OUT1 and OUT2 output pins is

lengthened, which combined with the parasitic inductance and

floating capacitance elements of the power MOS FET causes

the voltage of the OUT1 and OUT2 pins to fall below that of the GND pin (undershoot). In this case, clamp the undershoot

by connecting a Schottky barrier diode as shown in Figure 4-14 to prevent the possibility of malfunction in the

µPC1909.

Figure 4-14. Power MOS FET Drive Circuit Block

GND

µPC1909

OUT1 (Pin No.11),

OUT2 (Pin No.6)

EMI1 (Pin No.10),

EMI2 (Pin No.8)

3

Schottky barrier diode

Shunt resistor

Note that when active clamping, if the C-cut drive transistor is driven by OUT2, the voltage of the OUT2 pin may become

higher than VCC. It is therefore vital to observe VOUT2

≤ VCC + 5 V by taking action such as connecting a diode between

OUT2 and VCC.

Figure 4-13. 2SK1954 Gate Change Characteristics

VGS

VDS

0

2

4

6

8

10121416

20

40

60

80

100

120

140

160

2

0

4

6

8

10

12

14

16

VDD = 140 V

90 V

36 V

ID = 4 A

QG - Gate Charge - nC