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RT3624LE Datasheet(PDF) 27 Page - Richtek Technology Corporation |
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RT3624LE Datasheet(HTML) 27 Page - Richtek Technology Corporation |
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27 / 48 page ![]() RT3624LE Copyright © 2022 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation DS3624LE-00 April 2022 www.richtek.com 27 Table 8. SET4 Pin Setting for DBLR and kTON_A Vdivider_SET4 (mV) DBLR kTON_A 25 Enable DBLR 8phase 0.64 75 0.82 125 1 175 1.18 225 1.36 275 1.55 325 1.73 375 2.27 425 Disable DBLR 0.64 475 0.82 525 1 575 1.18 625 1.36 675 1.55 725 1.73 775 2.27 825 Enable DBLR 5 phase 0.64 875 0.82 925 1 975 1.18 1025 1.36 1075 1.55 1125 1.73 1175 2.27 1225 Enable DBLR 6 phase 0.64 1275 0.82 1325 1 1375 1.18 1425 1.36 1475 1.55 1525 1.73 1575 2.27 |
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