AT43USB325 datasheet(61/109 Pages) ATMEL

61 / 109 page

3355C–USB–4/05

AT43USB325

7.5.3

Port E Input Pins Address – PINE

The Port E Input Pins address, PINE, is not a register, and this address enables access to the

physical value on each Port E pin. When reading PORTE the Port E Data Latch is read, and

when reading PINE, the logical values present on the pins are read.

7.5.4

Port E as General Digital I/O

PEn, General I/O Pin: The DDEn bit in the DDRE register selects the direction of this pin. If

DDEn is set (one), PEn is con-figured as an output pin. If DDEn is cleared (zero), PEn is config-

ured as an input pin. The value of PORTEn has no meaning in this mode. The Port E pins are tri-

stated when a reset condition becomes active.

Note:

n: 7,6…0, pin number

7.6

Port F

Port F[1:3] is a 3-bit bi-directional I/O that becomes available after the program memory is writ-

ten at the end of POR. Three I/O memory address locations are allocated for the Port F, one

each for the Data Register - PORTF, $06($26), Data Direction Register - DDRF, $05($25) and

the Port F Input Pins - PIND, $04($24). The Port F Input Pins address is read only, while the

Data Register and the Data Direction Register are read/write. Some Port F pins have alternate

functions as shown in the following table:

After power up, PF[1:3] are used to load the program memory. This process is automatic. After

completion of program memory downloading, the SSN pin is de-asserted (=logic 1) and the pins

functions as GPIOs. When the pins are used for the alternate function, after downloading is

completed, the DDRF and PORTF register has to be set according to the alternate function

description.

Bit

$01 ($21)

PINE7

PINE6

PINE5

PINE4

PINE3

PINE2

PINE1

PINE0

PINE

Read/Write

R/W

Initial Value

N/A

Table 7-4.

DDEn Bits on Port E Pins

DDEn

PORTEn

I/O

Comment

Input

Tri-state (Hi-Z)

Input

Tri-state (Hi-Z)

Output

Push-pull Zero Output

Output

Push-pull One Output

Table 7-5.

Port F Pins Alternate Functions

Port Pin

Alternate Function 1

Alternate Function 2

PF1

SCK (SPI Bus Serial Clock)

OC1A (Timer/Counter1 Output CompareA

Match Output)

PF2

MOSI (SPI Bus Master Output/Slave Input)

OC1B (Timer/Counter1 Output CompareB

Match Output)

PF3

MISO (SPI Bus Master Input/Slave Output)

AT43USB325 Datasheet(PDF) 61 Page - ATMEL Corporation

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