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TMS320F Datasheet(PDF) 97 Page - Texas Instruments |
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TMS320F Datasheet(HTML) 97 Page - Texas Instruments |
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97 / 389 page  Indirect Addressing Mode 6-13 Addressing Modes Table 6–3 shows the opcode field bits and the notation used for indirect addressing. It also shows the corresponding operations performed on the current auxiliary register and the ARP. Table 6–3. Field Bits and Notation for Indirect Addressing Instruction Opcode Bits 15 – 8 7 6 5 4 3 2 1 0 Operand(s) Operation ← 8 MSBs → 10 0 0 0 ←NAR→ * No manipulation of current AR ← 8 MSBs → 10 0 0 1 ←NAR→ *,AR n NAR → ARP ← 8 MSBs → 10 0 1 0 ←NAR→ *– Current AR – 1 → current AR ← 8 MSBs → 10 0 1 1 ←NAR→ *–,AR n Current AR – 1 → current AR NAR → ARP ← 8 MSBs → 10 1 0 0 ←NAR→ *+ Current AR + 1 → current AR ← 8 MSBs → 10 1 0 1 ←NAR→ *+,AR n Current AR + 1 → current AR NAR → ARP ← 8 MSBs → 11 0 0 0 ←NAR→ *BR0– Current AR – rcAR0 → current AR † ← 8 MSBs → 11 0 0 1 ←NAR→ *BR0–,AR n Current AR – rcAR0 → current AR NAR → ARP † ← 8 MSBs → 11 0 1 0 ←NAR→ *0– Current AR – AR0 → current AR ← 8 MSBs → 11 0 1 1 ←NAR→ *0–,AR n Current AR – AR0 → current AR NAR → ARP ← 8 MSBs → 11 1 0 0 ←NAR→ *0+ Current AR + AR0 → current AR ← 8 MSBs → 11 1 0 1 ←NAR→ *0+,AR n Current AR + AR0 → current AR NAR → ARP ← 8 MSBs → 11 1 1 0 ←NAR→ *BR0+ Current AR + rcAR0 → current AR † ← 8 MSBs → 11 1 1 1 ←NAR→ *BR0+,AR n Current AR + rcAR0 → current AR NAR → ARP † † Bit-reversed addressing mode Legend: rc Reverse carry propagation NAR Next AR n 0, 1, 2, ..., or 7 8 MSBs Eight bits determined by instruction type and (sometimes) shift information → Is loaded into |
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