| Electronic Components Datasheet Search |
|
XRT86VL34 Datasheet(PDF) 35 Page - Exar Corporation |
|
|
|||||||||||||||||||||||||||||
XRT86VL34 Datasheet(HTML) 35 Page - Exar Corporation |
|
35 / 156 page ![]() XRT86VL34 30 REV. V1.2.0 QUAD T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION 4 AutoRx R/W 0 Auto Receive LAPD Message This bit configures the Receive HDLC Controller Block #1 to discard any incoming BOS or LAPD Message frame that exactly match which is currently stored in the Receive HDLC1 buffer. 0 = Disables this “AUTO DISCARD” feature 1 = Enables this “AUTO DISCARD” feature. 3 Tx_ABORT R/W 0 Transmit ABORT This bit configures the Transmit HDLC Controller Block #1 to trans- mit an ABORT sequence (string of 7 or more consecutive 1’s) to the Remote terminal. 0 - Configures the Transmit HDLC Controller Block # 1 to function normally (e.g., not transmit the ABORT sequence). 1 - Configures the Transmit HDLC Controller block # 1 to transmit the ABORT Sequence. 2 Tx_IDLE R/W 0 Transmit Idle (Flag Sequence Byte) This bit configures the Transmit HDLC Controller Block #1 to uncon- ditionally transmit a repeating string of Flag Sequence octets (0X7E) in the data link channel to the Remote terminal. In normal condi- tions, the Transmit HDLC Controller block will repeatedly transmit the Flag Sequence octet whenever there is no MOS message to transmit to the remote terminal equipment. However, if the user invokes this “Transmit Idle Sequence” feature, then the Transmit HDLC Controller block will UNCONDITIONALLY transmit a repeat- ing stream of the Flag Sequence octet (thereby overwriting all out- bound MOS data-link messages). 0 - Configures the Transmit HDLC Controller Block # 1 to transmit data-link information in a “normal” manner. 1 - Configures the Transmit HDLC Controller block # 1 to transmit a repeating string of Flag Sequence Octets (0x7E). NOTE: This bit is ignored if the Transmit HDLC1 controller is operating in the BOS Mode - bit 0 (MOS/BOS) within this register is set to 0. TABLE 16: DATA LINK CONTROL REGISTER (DLCR1) HEX ADDRESS: 0Xn113 BIT FUNCTION TYPE DEFAULT DESCRIPTION-OPERATION |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |