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XRT86VL34 Datasheet(PDF) 83 Page - Exar Corporation |
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XRT86VL34 Datasheet(HTML) 83 Page - Exar Corporation |
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83 / 156 page  XRT86VL34 78 REV. V1.2.0 QUAD T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION TABLE 57: RECEIVE SIGNALING ARRAY REGISTER 0 TO 23 (RSAR 0-23) HEX ADDRESS: 0Xn500 TO 0Xn517 BIT FUNCTION TYPE DEFAULT DESCRIPTION-OPERATION 7-4 Reserved - - Reserved 3 A RO 0 These READ ONLY registers reflect the most recently received sig- naling value (A,B,C,D) associated with timeslot 0 to 31. If signaling debounce feature is enabled, the received signaling state must be the same for 2 superframes before this register is updated. If the signaling bits for two consecutive superframes are not the same, the current value of this register will not be changed. When Bit 7 within register 0xn107 is set to ’1’, signaling bits in this register are updated on superframe boundary If the signaling debounce feature is disabled or if Bit 7 within register 0xn107 is set to ’0’, this register is updated as soon as the received signaling bits have changed. NOTE: The content of this register only has meaning when robbed- bit signaling is enabled. 2 B RO 0 1 C RO 0 0 D RO 0 |
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