SMC032BFY6 datasheet(31/91 Pages) STMICROELECTRONICS

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SMCxxxBF

Command Interface

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Table 22.

True IDE PIO mode Read/Write timing (1)

Symbol

Parameter

Mode 0 Mode 1 Mode 2 Mode 3 Mode 4 Mode 5 Mode 6 Unit

(2)

Cycle time (min)

600

383

240

180

120

100

Address Valid to -IORD/-IOWR

setup (min)

(2)

-IORD/-IOWR (min)

165

125

100

(2)

-IORD/-IOWR (min) Register (8

bit)

290

t2i

(2)

-IORD/-IOWR recovery time

(min)

7025

2520

-IOWR data setup (min)

-IOWR data hold (min)

-IORD data setup (min)

-IORD data hold (min)

t6Z

(3)

-IORD data tri-state (max)

(4)

Address valid to -IOCS16

assertion (max)

(4)

Address valid to -IOCS16

released (max)

-IORD/-IOWR to address valid

hold

The maximum load on -IOCS16 is 1 LSTTL with a 50pF total load.

t0 is the minimum total cycle time, t2 is the minimum command active time, and t2i is the minimum command recovery time

or command inactive time. The actual cycle time equals the sum of the actual command active time and the actual

command inactive time. The three timing requirements of t0, t2, and t2i have to be met. The minimum total cycle time

requirement is greater than the sum of t2 and t2i. This means a host implementation can lengthen either or both t2 or t2i to

ensure that t0 is equal to or greater than the value reported in the device's identify drive data. A CompactFlash Memory

Card implementation should support any legal host implementation.

This parameter specifies the time from the falling edge of -IORD to the moment when the data bus is no longer driven by the

CompactFlash Memory Card (tri-state).

t7 and t8 apply only to modes 0, 1 and 2. The -IOCS16 signal is not valid for other modes.

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