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M30302FAPFP Datasheet(PDF) 43 Page - Renesas Technology Corp |
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M30302FAPFP Datasheet(HTML) 43 Page - Renesas Technology Corp |
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43 / 57 page ![]() M16C/30P Group 5. Electrical Characteristics Rev.1.22 Mar 30, 2007 Page 43 of 53 REJ03B0088-0122 VCC1=VCC2=3V Timing Requirements (VCC1 = VCC2 = 3V, VSS = 0V, at Topr = −20 to 85°C / −40 to 85°C unless otherwise specified) NOTES: 1. The condition is VCC1=VCC2=2.7 to 3.0V. 2. Calculated according to the VCC1 voltage as follows: [ns] 3. Calculated according to the VCC1 voltage as follows: [ns] 4. Calculated according to the VCC1 voltage as follows: [ns] NOTES: 1. Calculated according to the BCLK frequency as follows: 2. Calculated according to the BCLK frequency as follows: n is ”2” for 1-wait setting. Table 5.29 External Clock Input (XIN input) Symbol Parameter Standard Unit Min. Max. tc External Clock Input Cycle Time (NOTE 2) ns tw(H) External Clock Input HIGH Pulse Width (NOTE 3) ns tw(L) External Clock Input LOW Pulse Width (NOTE 3) ns tr External Clock Rise Time (NOTE 4) ns tf External Clock Fall Time (NOTE 4) ns Table 5.30 Memory Expansion Mode and Microprocessor Mode Symbol Parameter Standard Unit Min. Max. tac1(RD-DB) Data Input Access Time (for setting with no wait) (NOTE 1) ns tac2(RD-DB) Data Input Access Time (for setting with wait) (NOTE 2) ns tsu(DB-RD) Data Input Setup Time 50 ns tsu(RDY-BCLK) RDY Input Setup Time 40 ns tsu(HOLD-BCLK) HOLD Input Setup Time 50 ns th(RD-DB) Data Input Hold Time 0 ns th(BCLK-RDY) RDY Input Hold Time 0 ns th(BCLK-HOLD) HOLD Input Hold Time 0 ns 10 6 – 20 VCC1 44 – × ---------------------------------------- 10 6 – 20 VCC1 44 – × ---------------------------------------- 0.4 × 10 – VCC1 45 + × 0.5x10 9 fBCLK () ------------------------60 ns [] – n0.5 – ()x10 9 fBCLK () ------------------------------------ 60 ns [] – |
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