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M30302FAPFP Datasheet(PDF) 12 Page - Renesas Technology Corp |
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M30302FAPFP Datasheet(HTML) 12 Page - Renesas Technology Corp |
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12 / 57 page ![]() M16C/30P Group 1. Overview Rev.1.22 Mar 30, 2007 Page 12 of 53 REJ03B0088-0122 1.6 Pin Description I : Input O : Output I/O : Input and output Table 1.8 Pin Description (1) Signal Name Pin Name I/O Type Description Power supply input VCC1, VCC2 VSS I Apply 2.7 to 5.5 V to the VCC1 and VCC2 pins and 0 V to the VSS pin. The VCC apply condition is that VCC1 = VCC2. Analog power supply input AVCC AVSS I Applies the power supply for the A/D converter. Connect the AVCC pin to VCC1. Connect the AVSS pin to VSS. Reset input RESET I The microcomputer is in a reset state when applying “L” to the this pin. CNVSS CNVSS I Switches processor mode. Connect this pin to VSS to when after a reset to start up in single-chip mode. Connect this pin to VCC1 to start up in microprocessor mode. External data bus width select input BYTE I Switches the data bus in external memory space. The data bus is 16 bits long when the this pin is held "L" and 8 bits long when the this pin is held "H". Set it to either one. Connect this pin to VSS when an single-chip mode. Bus control pins D0 to D7 I/O Inputs and outputs data (D0 to D7) when these pins are set as the separate bus. D8 to D15 I/O Inputs and outputs data (D8 to D15) when external 16-bit data bus is set as the separate bus. A0 to A19 O Output address bits (A0 to A19). CS0 to CS3 O Output CS0 to CS3 signals. CS0 to CS3 are chip-select signals to specify an external space. WRL/WR WRH/BHE RD O Output WRL, WRH, (WR, BHE), RD signals. WRL and WRH or BHE and WR can be switched by program. • WRL, WRH and RD are selected The WRL signal becomes "L" by writing data to an even address in an external memory space. The WRH signal becomes "L" by writing data to an odd address in an external memory space. The RD pin signal becomes "L" by reading data in an external memory space. • WR, BHE and RD are selected The WR signal becomes "L" by writing data in an external memory space. The RD signal becomes "L" by reading data in an external memory space. The BHE signal becomes "L" by accessing an odd address. Select WR, BHE and RD for an external 8-bit data bus. ALE O ALE is a signal to latch the address. HOLD I While the HOLD pin is held "L", the microcomputer is placed in a hold state. HLDA O In a hold state, HLDA outputs a "L" signal. RDY I While applying a "L" signal to the RDY pin, the microcomputer is placed in a wait state. |
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