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M30302FAPFP Datasheet(PDF) 24 Page - Renesas Technology Corp |
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M30302FAPFP Datasheet(HTML) 24 Page - Renesas Technology Corp |
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24 / 57 page  M16C/30P Group 5. Electrical Characteristics Rev.1.22 Mar 30, 2007 Page 24 of 53 REJ03B0088-0122 NOTES: 1. Referenced to VCC1 = VCC2 = 2.7 to 5.5V at Topr = −20 to 85°C / −40 to 85°C unless otherwise specified. 2. The Average Output Current is the mean value within 100ms. 3. The total IOL(peak) for ports P0, P1, P2, P8_6, P8_7, P9 and P10 must be 80mA max. The total IOL(peak) for ports P3, P4, P5, P6, P7 and P8_0 to P8_4 must be 80mA max. The total IOH(peak) for ports P0, P1, and P2 must be −40mA max. The total IOH(peak) for ports P3, P4 and P5 must be −40mA max. The total IOH(peak) for ports P6, P7, and P8_0 to P8_4 must be −40mA max. The total IOH(peak) for ports P8_6, P8_7 and P9 must be −40mA max. Set Average Output Current to 1/2 of peak. 4. Relationship between main clock oscillation frequency, and supply voltage. Table 5.2 Recommended Operating Conditions (1) Symbol Parameter Standard Unit Min. Typ. Max. VCC Supply Voltage (VCC1=VCC2) 2.7 5.0 5.5 V AVCC Analog Supply Voltage VCC V VSS Supply Voltage 0V AVSS Analog Supply Voltage 0 V VIH HIGH Input Voltage P3_1 to P3_7, P4_0 to P4_7, P5_0 to P5_7 0.8VCC VCC V P0_0 to P0_7, P1_0 to P1_7, P2_0 to P2_7, P3_0 (during single-chip mode) 0.8VCC VCC V P0_0 to P0_7, P1_0 to P1_7, P2_0 to P2_7, P3_0 (data input during memory expansion and microprocessor mode) 0.5VCC VCC V P6_0 to P6_7, P7_2 to P7_7, P8_0 to P8_7, P9_0 to P9_7, P10_0 to P10_7, XIN, RESET, CNVSS, BYTE 0.8VCC VCC V P7_0, P7_1 0.8VCC 6.5 V VIL LOW Input Voltage P3_1 to P3_7, P4_0 to P4_7, P5_0 to P5_7 00.2VCC V P0_0 to P0_7, P1_0 to P1_7, P2_0 to P2_7, P3_0 (during single-chip mode) 00.2VCC V P0_0 to P0_7, P1_0 to P1_7, P2_0 to P2_7, P3_0 (data input during memory expansion and microprocessor mode) 00.16VCC V P6_0 to P6_7, P7_0 to P7_7, P8_0 to P8_7, P9_0 to P9_7, XIN, RESET, CNVSS, BYTE 00.2VCC V IOH(peak) HIGH Peak Output Current P0_0 to P0_7, P1_0 to P1_7, P2_0 to P2_7, P3_0 to P3_7, P4_0 to P4_7, P5_0 to P5_7, P6_0 to P6_7, P7_2 to P7_7, P8_0 to P8_4, P8_6, P8_7, P9_0 to P9_7, P10_0 to P10_7 −10.0 mA IOH(avg) HIGH Average Output Current P0_0 to P0_7, P1_0 to P1_7, P2_0 to P2_7, P3_0 to P3_7, P4_0 to P4_7, P5_0 to P5_7, P6_0 to P6_7, P7_2 to P7_7, P8_0 to P8_4, P8_6, P8_7, P9_0 to P9_7, P10_0 to P10_7 −5.0 mA IOL(peak) LOW Peak Output Current P0_0 to P0_7, P1_0 to P1_7, P2_0 to P2_7, P3_0 to P3_7, P4_0 to P4_7, P5_0 to P5_7, P6_0 to P6_7, P7_0 to P7_7, P8_0 to P8_4, P8_6, P8_7, P9_0 to P9_7, P10_0 to P10_7 10.0 mA IOL(avg) LOW Average Output Current P0_0 to P0_7, P1_0 to P1_7, P2_0 to P2_7, P3_0 to P3_7, P4_0 to P4_7, P5_0 to P5_7, P6_0 to P6_7, P7_0 to P7_7, P8_0 to P8_4, P8_6, P8_7, P9_0 to P9_7, P10_0 to P10_7 5.0 mA f(XIN) Main Clock Input Oscillation Frequency (4) VCC=3.0V to 5.5V 016 MHz VCC=2.7V to 3.0V 020×VCC1 −44 MHz f(XCIN) Sub-Clock Oscillation Frequency 32.768 50 kHz f(BCLK) CPU Operation Clock 0 16 MHz Main clock input oscillation frequency 16.0 0.0 VCC1[V] (main clock: no division) 5.5 3.0 10.0 2.7 20 x VCC1-44MHz |
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