PCA9641PW datasheet(17/55 Pages) NXP

17 / 55 page

PCA9641

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Product data sheet

Rev. 2.1 — 27 October 2015

17 of 55

NXP Semiconductors

PCA9641

2-channel I2C-bus master arbiter

TEST_INT

W only

Test interrupt output pin; a master can send an

interrupt to itself by writing ‘1’ to this register bit.

Writing ‘0’ to this register bit has no effect. To clear

this interrupt, master must write ‘1’ to

TEST_INT_INT in Interrupt Status register.

Normal operation

Causes PCA9641 INT pin to go LOW if not masked

by TEST_INT_INT in Interrupt Mask register. Allows

this master to invoke its Interrupt Service Routine to

handle housekeeping tasks.

MBOX_FULL

R only

This is a read-only status register bit. If this bit is ‘0’,

it indicates no data is available in the mail box. If it is

‘1’, it indicates new data is available in the mail box.

No data is available for this master.

Mailbox contains data for this master from the other

master.

MBOX_EMPTY

R only

This is a read-only status register bit. If this bit is ‘0’,

it indicates other master mailbox is full, and this

master cannot send more data to other master

mailbox. If it is ‘1’, it indicates other master is empty

and this master can send data to other master

mailbox.

Other master mailbox is full; wait until other master

reads data.

Other master mailbox is empty. Other master has

read previous data and it is permitted to write new

data.

BUS_HUNG

R only

This is a read-only status register bit. If this register

bit is ‘0’, it indicates the bus is in normal condition. If

this bit is ‘1’, it indicates the bus is hung. The hung

bus means SDA signal is LOW and SCL signal does

not toggle for more than 500 ms or SCL is LOW for

500 ms.

Normal operation

Downstream bus hung; when SDA signal is LOW

and SCL signal does not toggle for more than

500 ms or SCL is LOW for 500 ms.

BUS_INIT_FAIL

R only

This is a read-only status register bit. If this register

bit is ‘0’, it indicates the bus initialization function has

passed. The downstream bus is in idle mode (SCL

and SDA are HIGH). If this register bit is ‘1’, it

indicates the bus initialization function has failed.

The SDA signal could be stuck LOW.

Normal operation

Bus initialization has failed. SDA still LOW, the

downstream bus cannot recover.

Table 10.

STATUS - Status register (pointer address 02h) bit description …continued

POR = 00h.

Legend: * default value

Bit

Symbol

Access

Value

Description

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