PM5366-PI datasheet(51/267 Pages) PMC

51 / 267 page

PRELIMINARY

PM5366 TEMAP-84

DATASHEET

PMC-2010672

ISSUE 1

HIGH DENSITY 84/63 CHANNEL VT/TU MAPPER

AND M13 MULTIPLEXER

PROPRIETARY AND CONFIDENTIAL

Pin Name

Type

No.

Function

LAOE/LATPL

Output AB11 The LATPLSEL bit of the SONET/SDH Master Egress

VTPP Configuration register determines the function of

this output. When LATPLSEL is logic 1, the signal is

LATPL. When LATPLSEL is logic 0, the signal is

LAOE.

Line Add Bus Output Enable (LAOE). The Add Bus

output enable signal is asserted high whenever the

Line Add Bus is being driven which is co-coincident

with the Line Add bus outputs coming out of tri-state.

This pin is intended to control an external multiplexer

when multiple TEMAP-84s are driving the Telecom Add

bus during their individual tributaries. This same

function is accomplished with the Add bus tristate

drivers but increased tolerance to tributary

configuration problems is possible with an external

mux. This output is controlled via the LAOE bit in the

TTMP Tributary Control registers when the egress

VTPP is bypassed. When the the egress VTPP is not

bypassed or a TU-3 is being mapped, LAOE is high.

Line Add Bus Tributary Payload Active (LDATPL).

The tributary payload active signal marks the bytes

carrying the tributary payload. LATPL is high during

each tributary payload byte on the LADATA[7:0] bus.

LATPL will be low during transport overhead, path

overhead, V1 bytes and V2 bytes. To indicate pointer

adjustments, LATPL will be asserted appropriately

during the V3 byte and following byte for the tributary.

LAOE/LATPL is updated on the rising edge of

LREFCLK.

PM5366-PI Datasheet(PDF) 51 Page - PMC-Sierra, Inc

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