PM5366-PI datasheet(15/267 Pages) PMC

15 / 267 page

PRELIMINARY

PM5366 TEMAP-84

DATASHEET

PMC-2010672

ISSUE 1

HIGH DENSITY 84/63 CHANNEL VT/TU MAPPER

AND M13 MULTIPLEXER

PROPRIETARY AND CONFIDENTIAL

• When configured to operate as a DS3 or E3 Framer, gapped transmit and

receive clocks can be optionally generated for interface to link layer devices

which only need access to payload data bits.

• DS3 or E3 Transmit clock source can be selected from either an external

oscillator or from the receive side clock (loop-timed).

• Provides a SONET/SDH Add/Drop bus interface with integrated VT1.5, TU-11,

VT2 and TU-12 mapper for T1and E1 streams. Also provides a DS3 mapper.

• System side interface is an SBI bus.

• Provides a generic 8-bit microprocessor bus interface for configuration, control

and status monitoring.

• Provides a standard 5 signal P1149.1 JTAG test port for boundary scan board

test purposes.

• Low power 1.8V/3.3V CMOS technology. All pins are 5V tolerant.

• 324-pin fine pitch PBGA package (23mm x 23mm). Supports industrial

temperature range (-40

oC to 85oC) operation.

Each one of 84 T1 performance monitor sections:

• Provides non-intrusive performance monitoring of either ingress or egress paths,

as selected on a per-tributary basis.

• Frames to DS-1 signals in SF, SLC96 and ESF formats.

• Frames to TTC JT-G.704 multiframe formatted J1 signals. Supports the

alternate CRC-6 calculation for Japanese applications.

• Provides Red, Yellow, and AIS alarm integration.

• Supports RAI-CI and AIS-CI alarm detection and generation.

• Non-intrusive performance monitoring provided by the TEMAP-84 also

provides an HDLC interface with 128 bytes of buffering for terminating the

facility data link in either the ingress or egress paths, as selected on a per-

tributary basis.

• Provides Inband Loopback Code detection.

PM5366-PI Datasheet(PDF) 15 Page - PMC-Sierra, Inc