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PM5366-PI Datasheet(PDF) 54 Page - PMC-Sierra, Inc

Part # PM5366-PI
Description  HIGH DENSITY 84/63 CHANNEL VT/TU MAPPER AND M13 MULTIPLEXER
PDF  267 Pages
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Manufacturer  PMC [PMC-Sierra, Inc]
Direct Link  http://www.pmc-sierra.com
Logo PMC - PMC-Sierra, Inc

PM5366-PI Datasheet(HTML) 54 Page - PMC-Sierra, Inc

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PRELIMINARY
PM5366 TEMAP-84
DATASHEET
PMC-2010672
ISSUE 1
HIGH DENSITY 84/63 CHANNEL VT/TU MAPPER
AND M13 MULTIPLEXER
PROPRIETARY AND CONFIDENTIAL
42
Pin Name
Type
Pin
No.
Function
LDDP
Input
Y7
Line Drop Bus Data Parity (LDDP). The incoming
data parity signal carries the parity of the incoming
signals. The parity calculation encompasses the
LDDATA[7:0] bus and optionally the LDC1J1V1 and
LDPL signals. LDC1J1V1 and LDPL can be included
in the parity calculation by setting the INCLDC1J1V1
and INCLDPL bits in the SONET/SDH Master Ingress
Configuration register high, respectively. Odd parity is
selected by setting the LDOP bit in the Master
SONET/SDH Ingress Configuration register high and
even parity is selected by setting the LDOP bit low.
LDDP is sampled on the rising edge of LREFCLK.
LDC1J1V1
Input
AB6 Line Drop C1/J1 Frame Pulse (LDC1J1V1). The
input C1/J1 frame pulse identifies the transport
envelope and synchronous payload envelope frame
boundaries on the incoming SONET stream.
LDC1J1V1 is set high while LDPL is low to mark the
first C1 byte of the transport envelope frame on the
LDDATA[7:0] bus. LDC1J1V1 is set high while LDPL is
high to mark each J1 byte of the synchronous payload
envelope(s) on the LDDATA[7:0] bus. LDC1J1V1 must
be present at every occurrence of the first C1 and all
J1 bytes.
Optionally LDC1J1V1 indicates multiframe alignment
when high during the first V1 bytes of each envelope.
LDC1J1V1 is sampled on the rising edge of LREFCLK.
LDPL
Input
AB7 Line Drop Bus Payload Active (LDPL). The payload
active signal identifies the bytes on LDDATA[7:0] that
carry payload bytes.
LDPL is set high during path overhead and payload
bytes and low during transport overhead bytes. LDPL
is set high during the H3 byte to indicate a negative
pointer justification and low during the byte following
H3 to indicate a positive pointer justification event.
LDPL is sampled on the rising edge of LREFCLK.



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